STM32H750VB STM32H750IB STM32H750XB 32-bit Arm Cortex -M7 480MHz MCUs, 128 KB Flash, 1MB RAM, 46 com. and analog interfaces, crypto Datasheet - production data Features FBGA Core TFBGA240+25 (14x14 mm) 32-bit Arm Cortex -M7 core with double- precision FPU and L1 cache: 16 Kbytes of data FBGA and 16 Kbytes of instruction cache frequency LQFP100 up to 480 MHz, MPU, 1027 DMIPS/ (14x14 mm) 2.14 DMIPS/MHz (Dhrystone 2.1), and DSP UFBGA176+25 instructions (10x10 mm) Memories D2: communication peripherals and timers 128 Kbytes of Flash memory D3: reset/clock control/power management 1 Mbyte of RAM: 192 Kbytes of TCM RAM (inc. 1.62 to 3.6 V application supply and I/Os 64 Kbytes of ITCM RAM + 128 Kbytes of POR, PDR, PVD and BOR DTCM RAM for time critical routines), Dedicated USB power embedding a 3.3 V 864 Kbytes of user SRAM, and 4 Kbytes of internal regulator to supply the internal PHYs SRAM in Backup domain Embedded regulator (LDO) with configurable Dual mode Quad-SPI memory interface scalable output to supply the digital circuitry running up to 133 MHz Voltage scaling in Run and Stop mode (6 Flexible external memory controller with up to configurable ranges) 32-bit data bus: SRAM, PSRAM, NOR Flash memory Backup regulator (~0.9 V) clocked up to 133 MHz in synchronous Voltage reference for analog peripheral/V REF+ mode Low-power modes: Sleep, Stop, Standby and SDRAM/LPSDR SDRAM V supporting battery charging BAT 8/16-bit NAND Flash memories CRC calculation unit Low-power consumption V battery operating mode with charging BAT Security capability ROP, PC-ROP, active tamper, secure firmware CPU and domain power state monitoring pins upgrade support, Secure access mode 2.95 A in Standby mode (Backup SRAM OFF, RTC/LSE ON) General-purpose input/outputs Up to 168 I/O ports with interrupt capability Clock management Internal oscillators: 64 MHz HSI, 48 MHz Reset and power management HSI48, 4 MHz CSI, 32 kHz LSI 3 separate power domains which can be External oscillators: 4-48 MHz HSE, independently clock-gated or switched off: 32.768 kHz LSE D1: high-performance capabilities April 2019 DS12556 Rev 4 1/323 This is information on a product in full production. www.st.comSTM32H750VB STM32H750IB STM32H750XB 3 PLLs (1 for the system clock, 2 for kernel Graphics clocks) with Fractional mode LCD-TFT controller up to XGA resolution Interconnect matrix Chrom-ART graphical hardware Accelerator (DMA2D) to reduce CPU load 3 bus matrices (1 AXI and 2 AHB) Hardware JPEG Codec Bridges (5 AHB2-APB, 2 AXI2-AHB) Up to 22 timers and watchdogs 4 DMA controllers to unload the CPU 1 high-resolution timer (2.1 ns max 1 high-speed master direct memory access resolution) controller (MDMA) with linked list support 2 32-bit timers with up to 4 IC/OC/PWM or 2 dual-port DMAs with FIFO pulse counter and quadrature (incremental) 1 basic DMA with request router capabilities encoder input (up to 240 MHz) 2 16-bit advanced motor control timers (up to Up to 35 communication peripherals 240 MHz) 4 I2Cs FM+ interfaces (SMBus/PMBus) 10 16-bit general-purpose timers (up to 4 USARTs/4x UARTs (ISO7816 interface, 240 MHz) LIN, IrDA, up to 12.5 Mbit/s) and 1x LPUART 5 16-bit low-power timers (up to 240 MHz) 6 SPIs, 3 with muxed duplex I2S audio class 2 watchdogs (independent and window) accuracy via internal audio PLL or external clock, 1x I2S in LP domain (up to 150 MHz) 1 SysTick timer 4x SAIs (serial audio interface) RTC with sub-second accuracy and hardware calendar SPDIFRX interface SWPMI single-wire protocol master I/F Cryptographic acceleration MDIO Slave interface AES 128, 192, 256, TDES, 2 SD/SDIO/MMC interfaces (up to 125 MHz) HASH (MD5, SHA-1, SHA-2), HMAC 2 CAN controllers: 2 with CAN FD, 1 with True random number generators time-triggered CAN (TT-CAN) 2 USB OTG interfaces (1FS, 1HS/FS) crystal- Debug mode less solution with LPM and BCD SWD & JTAG interfaces Ethernet MAC interface with DMA controller 4-Kbyte Embedded Trace Buffer HDMI-CEC 96-bit unique ID 8- to 14-bit camera interface (up to 80 MHz) All packages are ECOPACK 2 compliant 11 analog peripherals 3 ADCs with 16-bit max. resolution (up to 36 channels, up to 3.6 MSPS) 1 temperature sensor 2 12-bit D/A converters (1 MHz) 2 ultra-low-power comparators 2 operational amplifiers (7.3 MHz bandwidth) 1 digital filters for sigma delta modulator (DFSDM) with 8 channels/4 filters 2/323 DS12556 Rev 4