VNS3NV04DPTR-E STMicroelectronics

VNS3NV04DP-E OMNIFET II fully autoprotected Power MOSFET Features Max on-state resistance (per ch.) R 120 m ON Current limitation (typ) I 3.5 A LIMH Drain-source clamp voltage V 40 V CLAMP SO-8 ECOPACK : lead free and RoHS compliant Automotive Grade: compliance with AEC guidelines Description Linear current limitation The VNS3NV04DP-E device is made up of two Thermal shutdown monolithic chips (OMNIFET II) housed in a standard SO-8 package. The OMNIFET II is Short circuit protection designed using STMicroelectronics VIPower Integrated clamp M0-3 technology and is intended for replacement Low current drawn from input pin of standard Power MOSFETs in up to 50 kHz DC applications. Diagnostic feedback through input pin ESD protection Built-in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh Direct access to the gate of the Power environments. MOSFET (analog driving) Fault feedback can be detected by monitoring Compatible with standard Power MOSFET voltage at the input pin Table 1. Device summary Order codes Package Tube Tape and reel SO-8 VNS3NV04DP-E VNS3NV04DPTR-E September 2013 Doc ID 018529 Rev 2 1/21 www.st.com 1Contents VNS3NV04DP-E Contents 1 Block diagram and pin description . 5 2 Electrical specifications 6 2.1 Absolute maximum ratings . 6 2.2 Thermal data . 7 2.3 Electrical characteristics . 7 2.4 Electrical characteristics curves 12 3 Protection features . 16 3.1 Overvoltage clamp protection 16 3.2 Linear current limiter circuit . 16 3.3 Overtemperature and short circuit protection 16 3.4 Status feedback 16 4 Package and packing information . 17 4.1 ECOPACK packages . 17 4.2 SO-8 mechanical data . 17 4.3 SO-8 packing information . 19 5 Revision history . 20 2/21 Doc ID 018529 Rev 2