CTSLV351SG CTS

CTSLV351 Low Phase Noise LVPECL Buffer & Translator SC70-6 FEATURES BLOCK DIAGRAM LVPECL Outputs Optimized for Very Low Phase Noise (-165dBc/Hz) Up to 800MHz Bandwidth Selectable 1, 2 Output Selectable Enable Logic 3.0V to 3.6V Operation RoHS Compliant Pb Free Packages DESCRIPTION The CTS LV351 is a sine wave/CMOS to LVPECL buffer & translator optimized for very low phase noise (-1 65dBc/Hz). It is particularly useful in converting crystal or SAW based oscillators into LVPECL outputs for up 800 MHz of bandwidth. The CTS LV351 is one of a family of parts that provide options of fixed 1, fixed 2 and selectable 1, 2 mode s as well as active high enable or active low enable to oscillator designers. Refer to Table 1 for the comp arison of parts within the CTSLV35x and CTSLV363 family. ENGINEERING NOTES Functionality Table 1 details the differences between the parts to assist designers in selecting the optimal part for their design. Table 2 lists the specific CTSLV351 functional operation. Figure 1 plots the S-parameters of the D input. Table 1 EN Pull-Up / Part Number Divide Ratio EN Logic Bandwidth Pull-Down CTSLV351 1 active HIGH Pull-up > 800MHz CTSLV353 Selectable 1 or 2 selectable selectable > 800MHz CTSLV363 Selectable 1 or 2 selectable selectable 1GHz North Americas: +1-800-757-6686 International: +1-508-435-6831 Asia: +65-655-17551 www.ctscorp.com/semiconductors Specifications are subject to change without notice. 1 Rev B0215 CTSLV351 Low Phase Noise LVPECL Buffer & Translator SC70-6 Table 2 - CTSLV351 Functional Operation, 1 mode Inputs Outputs Part Number EN SEL D Q Q Low Low High High, NC CTSLV351 High High Low Low X Z Z Figure 1 - S11, Parameters, D Input North Americas: +1-800-757-6686 International: +1-508-435-6831 Asia: +65-655-17551 www.ctscorp.com/semiconductors Specifications are subject to change without notice. 2 Rev B0215