5962-90606022A E2v

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED Revised to use alternate die/fabrication requirements and QD certification 00-05-24 Raymond Monnin A mark. New boilerplate. -ljs The original first page of this drawing has been replaced. REV SHEET REV SHEET REV STATUS REV AAAA AAAA AAAA OF SHEETS SHEET 1234 5678 9 10 11 12 PMIC N/A PREPARED BY Thanh V. Nguyen DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 STANDARD CHECKED BY Thanh V. Nguyen MICROCIRCUIT DRAWING APPROVED BY Monica L. Poelking THIS DRAWING IS AVAILABLE MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED FOR USE BY ALL SCHOTTKY TTL, FLIP-FLOP, MONOLITHIC DEPARTMENTS AND AGENCIES OF THE DRAWING APPROVAL DATE SILICON DEPARTMENT OF DEFENSE 93-02-01 AMSC N/A REVISION LEVEL SIZE CAGE CODE 5962-90606 A A 67268 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E274-00 DISTRIBUTION STATEMENT A. Approved for public release distribution is unlimited.1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-90606 01 C X Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54F113 Dual J-K negative edge-triggered flip-flop with set input 02 54F112 Dual J-K negative edge-triggered flip-flop with set and reset inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack E GDIP1-T16 or CDIP2-T16 16 Dual in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range ....................................................................... -0.5 V dc minimum to +7.0 V dc maximum Input voltage range .......................................................................... -0.5 V dc minimum to +7.0 V dc maximum Input current range ........................................................................... -30.0 mA to +5.0 mA Voltage applied to output in high output state range ........................ -0.5 V to V CC Current applied to output in low output state ................................... 40 mA Storage temperature range ............................................................ -65 C to +150 C Thermal resistance, junction-to-case ( ) ....................................... See MIL-STD-1835 JC Junction temperature (T ).................................................................. +175 C J Lead temperature (soldering, 10 seconds) ....................................... +300 C Maximum power dissipation (P ) 2/ D Device type 01............................................................................. 115.5 mW Device type 02............................................................................. 104.5 mW 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Maximum power dissipation is defined as V x I and must withstand the added P due to the short-circuit output test. CC CC D SIZE STANDARD 5962-90606 A MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS REVISION LEVEL SHEET COLUMBUS, OHIO 43216-5000 A 2 DSCC FORM 2234 APR 97