Features Compatible with MCS 51 Products 12K Bytes of In-System Programmable (ISP) Flash Program Memory SPI Serial Interface for Program Downloading Endurance: 10,000 Write/Erase Cycles 2K Bytes EEPROM Data Memory Endurance: 100,000 Write/Erase Cycles 64-byte User Signature Array 2.7V to 5.5V Operating Range 8-bit Fully Static Operation: 0 Hz to 24 MHz (in x1 and x2 Modes) Three-level Program Memory Lock Microcontroller 256 x 8-bit Internal RAM 32 Programmable I/O Lines with 12 Kbyte Three 16-bit Timer/Counters Nine Interrupt Sources Flash Enhanced UART Serial Port with Framing Error Detection and Automatic Address Recognition Enhanced SPI (Double Write/Read Buffered) Serial Interface AT89S8253 Low-power Idle and Power-down Modes Interrupt Recovery from Power-down Mode Programmable Watchdog Timer Dual Data Pointer Power-off Flag Flexible ISP Programming (Byte and Page Modes) Page Mode: 64 Bytes/Page for Code Memory, 32 Bytes/Page for Data Memory Four-level Enhanced Interrupt Controller Programmable and Fuseable x2 Clock Option Internal Power-on Reset 42-pin PDIP Package Option for Reduced EMC Emission Green (Pb/Halide-free) Packaging Option 1. Description The AT89S8253 is a low-power, high-performance CMOS 8-bit microcontroller with 12K bytes of In-System Programmable (ISP) Flash program memory and 2K bytes of EEPROM data memory. The device is manufactured using Atmels high-density non- volatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pinout. The on-chip downloadable Flash allows the program mem- ory to be reprogrammed in-system through an SPI serial interface or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with downloadable Flash on a monolithic chip, the Atmel AT89S8253 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications. 3286PMICRO3/10The AT89S8253 provides the following standard features: 12K bytes of In-System Programma- ble Flash, 2K bytes of EEPROM, 256 bytes of RAM, 32 I/O lines, programmable watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector, four-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S8253 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next external inter- rupt or hardware reset. The on-board Flash/EEPROM is accessible through the SPI serial interface. Holding RESET active forces the SPI bus into a serial programming interface and allows the program memory to be written to or read from, unless one or more lock bits have been activated. 2. Pin Configurations 2.1 40P6 40-lead PDIP (T2) P1.0 1 40 VCC (T2 EX) P1.1 2 39 P0.0 (AD0) P1.2 3 38 P0.1 (AD1) P1.3 4 37 P0.2 (AD2) (SS) P1.4 5 36 P0.3 (AD3) (MOSI) P1.5 6 35 P0.4 (AD4) (MISO) P1.6 7 34 P0.5 (AD5) (SCK) P1.7 8 33 P0.6 (AD6) RST 9 32 P0.7 (AD7) (RXD) P3.0 10 31 EA/VPP (TXD) P3.1 11 30 ALE/PROG (INT0) P3.2 12 29 PSEN (INT1) P3.3 13 28 P2.7 (A15) (T0) P3.4 14 27 P2.6 (A14) (T1) P3.5 15 26 P2.5 (A13) (WR) P3.6 16 25 P2.4 (A12) (RD) P3.7 17 24 P2.3 (A11) XTAL2 18 23 P2.2 (A10) XTAL1 19 22 P2.1 (A9) GND 20 21 P2.0 (A8) 2.2 44A 44-lead TQFP (MOSI) P1.5 1 33 P0.4 (AD4) (MISO) P1.6 2 32 P0.5 (AD5) (SCK) P1.7 3 31 P0.6 (AD6) 30 RST 4 P0.7 (AD7) (RXD) P3.0 5 29 EA/VPP NC 6 28 NC (TXD) P3.1 7 27 ALE/PROG (INT0) P3.2 8 26 PSEN (INT1) P3.3 9 25 P2.7 (A15) (T0) P3.4 10 24 P2.6 (A14) (T1) P3.5 11 23 P2.5 (A13) 2 AT89S8253 3286PMICRO3/10 (WR) P3.6 12 44 P1.4 (SS) (RD) P3.7 13 43 P1.3 XTAL2 14 42 P1.2 XTAL1 15 41 P1.1 (T2 EX) GND 16 40 P1.0 (T2) GND 17 39 NC (A8) P2.0 18 38 VCC (A9) P2.1 19 37 P0.0 (AD0) (A10) P2.2 20 36 P0.1 (AD1) (A11) P2.3 21 35 P0.2 (AD2) (A12) P2.4 22 34 P0.3 (AD3)