MC74HCT541A Octal 3-State Non-Inverting Buffer/Line Driver/ Line Receiver With LSTTL-Compatible Inputs www.onsemi.com HighPerformance SiliconGate CMOS The MC74HCT541A is identical in pinout to the LS541. This device may be used as a level converter for interfacing TTL or NMOS outputs to high speed CMOS inputs. SOIC20 TSSOP20 The HCT541A is an octal noninverting buffer/line driver/line DW SUFFIX DT SUFFIX receiver designed to be used with 3state memory address drivers, CASE 751D CASE 948E clock drivers, and other busoriented systems. This device features inputs and outputs on opposite sides of the package and two ANDed PIN ASSIGNMENT activelow output enables. V OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 CC 20 19 18 17 16 15 14 12 Features 13 11 Output Drive Capability: 15 LSTTL Loads TTL/NMOSCompatible Input Levels Outputs Directly Interface to CMOS, NMOS and TTL 1 2 3 4 567 8 9 10 Operating Voltage Range: 4.5 to 5.5 V OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND Low Input Current: 1 A In Compliance With the JEDEC Standard No. 7 A Requirements MARKING DIAGRAMS Chip Complexity: 134 FETs or 33.5 Equivalent Gates 20 NLV Prefix for Automotive and Other Applications Requiring 20 Unique Site and Control Change Requirements AECQ100 HCT HCT541A 541A Qualified and PPAP Capable AWLYYWWG ALYW These Devices are PbFree and are RoHS Compliant 1 1 LOGIC DIAGRAM SOIC20 TSSOP20 A = Assembly Location 2 18 A1 Y1 WL, L = Wafer Lot YY, Y = Year 3 17 WW, W = Work Week A2 Y2 G or = PbFree Package 4 16 (Note: Microdot may be in either location) A3 Y3 5 15 FUNCTION TABLE A4 Y4 Data Non-Inverting Inputs Inputs Outputs Output Y 6 14 A5 Y5 OE1 OE2 A L L L L 7 13 A6 Y6 L L H H H X X Z 8 12 A7 Y7 X H X Z Z = High Impedance 9 11 A8 Y8 X = Dont Care 1 ORDERING INFORMATION Output OE1 PIN 20 = V CC See detailed ordering and shipping information on page 4 of OE2 Enables PIN 10 = GND 19 this data sheet. Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: June, 2017 Rev. 8 MC74HCT541A/DMC74HCT541A MAXIMUM RATINGS Symbol Parameter Value Unit This device contains protection circuitry to guard against damage due V DC Supply Voltage (Referenced to GND) 0.5 to +7.0 V CC to high static voltages or electric V DC Input Voltage (Referenced to GND) 0.5 to V + 0.5 V fields. However, precautions must be in CC taken to avoid applications of any V DC Output Voltage (Referenced to GND) 0.5 to V + 0.5 V out CC voltage higher than maximum rated I DC Input Current, per Pin 20 mA voltages to this highimpedance in circuit. For proper operation, V and in I DC Output Current, per Pin 35 mA out V should be constrained to the out range GND (V or V ) V . I DC Supply Current, V and GND Pins 75 mA in out CC CC CC Unused inputs must always be tied P Power Dissipation in Still Air SOIC Package 500 mW D to an appropriate logic voltage level (e.g., either GND or V ). Unused T Storage Temperature Range 65 to +150 C CC stg outputs must be left open. T Lead Temperature, 1 mm from Case for 10 Seconds 260 C L (SOIC Package) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Derating: SOIC Package: 7 mW/ C from 65 to 125 C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit V DC Supply Voltage (Referenced to GND) 4.5 5.5 V CC V , V DC Input Voltage, Output Voltage 0 V V in out CC (Referenced to GND) T Operating Temperature Range, All Package Types 55 +125 C A t , t Input Rise/Fall Time (Figure 1) 0 500 ns r f Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. DC CHARACTERISTICS (Voltages Referenced to GND) Guaranteed Limit V CC V Symbol Parameter Condition 55 to 25C 85C 125C Unit V Minimum HighLevel Input Voltage V = 0.1V or V 0.1V 4.5 2.0 2.0 2.0 V IH out CC 5.5 2.0 2.0 2.0 I 20 A out V Maximum LowLevel Input Voltage V = 0.1V or V 0.1V 4.5 0.8 0.8 0.8 V IL out CC I 20 A 5.5 0.8 0.8 0.8 out V Minimum HighLevel Output Voltage V = V or V 4.5 4.4 4.4 4.4 V OH in IH IL I 20 A 5.5 5.4 5.4 5.4 out V = V or V I 6.0mA 4.5 3.98 3.84 3.70 in IH IL out V Maximum LowLevel Output Voltage V = V or V 4.5 0.1 0.1 0.1 V OL in IH IL I 20 A 5.5 0.1 0.1 0.1 out V = V or V I 6.0mA 4.5 0.26 0.33 0.40 in IH IL out I Maximum Input Leakage Current V = V or GND 5.5 0.1 1.0 1.0 A in in CC I Maximum 3State Leakage Current Output in High Impedance State 5.5 0.5 5.0 10.0 A OZ V = V or V in IL IH V = V or GND out CC I Maximum Quiescent Supply Current V = V or GND 5.5 4 40 160 A CC in CC (per Package) I = 0 A out I Additional Quiescent Supply Current V = 2.4V, Any One Input CC in 55C 25 to 125C V = V or GND, Other Inputs in CC I = 0 A 2.9 2.4 5.5 mA out 1. Total Supply Current = I + I . CC CC www.onsemi.com 2