S-5716 Series LOW CURRENT CONSUMPTION OMNIPOLAR / UNIPOLAR DETECTION TYPE www.ablic.com HALL EFFECT SWITCH IC ABLIC Inc., 2011-2021 Rev.1.7 00 This IC, developed by CMOS technology, is a high-accuracy Hall effect switch IC that operates with low current consumption. The output voltage changes when this IC detects the intensity level of magnetic flux density. Using this IC with a magnet makes it possible to detect the open / close in various devices. High-density mounting is possible by using the small SOT-23-3 package or the super small SNT-4A package. Due to its high-accuracy magnetic characteristics, this IC can make operation s dispersion in the system combined with magnet smaller. ABLIC Inc. offers amagnetic simulation servic that provides the ideal combination of magnets and our Hall effect ICs for customer systems. Our magnetic simulation service will reduce prototype production, development period and development costs. In addition, it will contribute to optimization of parts to realize high cost performance. For more information regarding our magnetic simulation service, contact our sales representatives. Features *1 Pole detection : Detection of omnipolar, S pole or N pole *1 Output logic : Active, active *1 Output form : Nch open-drain output, CMOS output *1 Magnetic sensitivity: B = 1.8 mT typ. OP B = 3.0 mT typ. OP B = 3.4 mT typ. OP B = 4.5 mT typ. OP B = 7.0 mT typ. OP Operating cycle (current consumption): Product with omnipolar detection t = 50.50 ms (I = 4.0 A) typ. CYCLE DD Product with S pole or N pole detection t = 50.85 ms (I = 2.6 A) typ. CYCLE DD Power supply voltage range: V = 2.7 V to 5.5 V DD Operation temperature range: Ta = 40C to +85C Lead-free (Sn 100%), halogen-free *1. The option can be selected. Applications Plaything, portable game Home appliance Housing equipment Industrial equipment Packages SOT-23-3 SNT-4A 1 LOW CURRENT CONSUMPTION OMNIPOLAR / UNIPOLAR DETECTION TYPE HALL EFFECT SWITCH IC S-5716 Series Rev.1.7 00 Block Diagrams 1. Nch open-drain output product VDD OUT Sleep / Awake logic *1 *1 Chopping stabilized amplifier VSS *1. Parasitic diode Figure 1 2. CMOS output product VDD *1 Sleep / Awake logic *1 OUT Chopping *1 stabilized amplifier VSS *1. Parasitic diode Figure 2 2