S-5725JCBH0-I4T1U ABLIC

S-5725 Series HIGH-SPEED www.ablic.com BIPOLAR HALL EFFECT LATCH IC ABLIC Inc., 2011-2021 Rev.2.6 00 This IC, developed by CMOS technology, is a high-accuracy hall effect latch IC that operates with a high-sensitivity, a high- speed detection and low current consumption. The output voltage changes when this IC detects the intensity level of magnetic flux density and a polarity change. Using the S-5725 Series with a magnet makes it possible to detect the rotation status in various devices. High-density mounting is possible by using the small SOT-23-3 or the super-small SNT-4A packages. Due to its high-accuracy magnetic characteristics, this IC can make operation s dispersion in the system combined with magnet smaller. ABLIC Inc. offers amagnetic simulation servic that provides the ideal combination of magnets and our Hall effect ICs for customer systems. Our magnetic simulation service will reduce prototype production, development period and development costs. In addition, it will contribute to optimization of parts to realize high cost performance. For more information regarding our magnetic simulation service, contact our sales representatives. Features Pole detection: Bipolar latch *1 Output logic: V = at S pole detection OUT V = at S pole detection OUT *1 Output form : Nch open-drain output, CMOS output *1 Magnetic sensitivity: B = 0.8 mT typ. OP B = 1.8 mT typ. OP B = 3.0 mT typ. OP B = 7.0 mT typ. OP *1 Operating cycle (current consumption): t = 50 s (I = 1400.0 A) typ. CYCLE DD t = 1.25 ms (I = 60.0 A) typ. CYCLE DD t = 6.05 ms (I = 13.0 A) typ. CYCLE DD Power supply voltage range: V = 2.7 V to 5.5 V DD Operation temperature range: Ta = 40C to +85C Built-in power-down circuit: Extends battery life (only SNT-4A) Lead-free (Sn 100%), halogen-free *1. The option can be selected. Applications Plaything, portable game Home appliance Housing equipment Industrial equipment Packages SOT-23-3 SNT-4A 1 HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC S-5725 Series Rev.2.6 00 Block Diagrams 1. Nch open-drain output product 1. 1 Product without power-down function VDD OUT Sleep / Awake logic *1 *1 Chopping stabilized amplifier VSS *1. Parasitic diode Figure 1 1. 2 Product with power-down function (SNT-4A) VDD *1 Power-down circuit Sleep / Awake logic OUT CE *1 *1 *1 Chopping stabilized amplifier VSS *1. Parasitic diode Figure 2 2