EH36 Series REGULATORY COMPLIANCE 2011/65 + 191 SVHC 2015/863 ITEM DESCRIPTION Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 3.3Vdc 4 Pad 3.2mm x 5.0mm Ceramic Surface Mount (SMD) ELECTRICAL SPECIFICATIONS Nominal Frequency 1MHz to 155.52MHz Frequency Tolerance/Stability Inclusive of all conditions: Calibration Tolerance at 25C, Frequency Stability over the Operating Temperature Range, Supply Voltage Change, Output Load Change, 1st Year Aging at 25C, Shock, and Vibration 100ppm Maximum 20ppm Maximum 25ppm Maximum 50ppm Maximum Aging at 25C 5ppm/year Maximum Operating Temperature Range 0C to +70C -40C to +85C Supply Voltage 3.3Vdc 10% Input Current No Load 35mA Maximum Output Voltage Logic High (V ) IOH = -8mA OH 2.7Vdc Minimum Output Voltage Logic Low (V ) IOL = +8mA OL 0.5Vdc Maximum Rise/Fall Time Measured at 20% to 80% of waveform 6nSec Maximum over Nominal Frequency of 1MHz to 70MHz 4nSec Maximum over Nominal Frequency of 70.000001MHz to 155.52MHz Duty Cycle Measured at 50% of waveform 50 10(%) 50 5(%) Load Drive Capability 30pF Maximum over Nominal Frequency of 1MHz to 70MHz 15pF Maximum over Nominal Frequency of 70.000001MHz to 155.52MHz Output Logic Type CMOS Pin 1 Connection Tri-State (High Impedance) Tri-State Input Voltage (Vih and Vil) 70% of Vdd Minimum to enable output, 20% of Vdd Maximum to disable output, No Connect to enable output. Absolute Clock Jitter 250pSec Maximum, 100pSec Typical One Sigma Clock Period Jitter 50pSec Maximum, 40pSec Typical Start Up Time 10mSec Maximum Storage Temperature Range -55C to +125C Revised F: 2/27/2015 Page 1 of 8 www.ecliptek.com EH36 Series PART NUMBERING GUIDE Revised F: 2/27/2015 Page 2 of 8 www.ecliptek.com