PXIe-9848/9848H 8-CH 14-Bit 100 MS/s High-Speed PXI Express Digitizer Introduction The ADLINK PXIe-9848/9848H is an 8-channel, 14-bit, 100 MS/s digitizer delivering both high-accuracy measure- ment results and high-dynamic performance. With a PXI Express bus interface and ample onboard acquisition memory up to 512 MB, the PXIe-9848/9848H can easily manage simultaneous 8-CH data streaming. High density and high speed digitizer features ideally position the PXIe-9848/9848H for applications such as LIDAR, radar signal acquisition, and PSU (Power Supply Unit) testing applications. PXIe-9848 The PXIe-9848 provides a flexible set of input ranges from 0.2V to 2V, software selectable 50 or 1M input impedance, a wide variety of triggering options and tight synchronization capability, all maximizing convenience of use. In addition, ADLINK provides the PXIe-9848H, features a x15/x50 signal conditioning module providing both high input voltage range of 100V and high dynamic performance, delivering the optimum solution to measure- ment range expansion in a PXI system. Highlights Flexible Use Options PXIe-9848H The PXIe-9848 provides a flexible input range from 0.2V to 2V, software selectable 50 or 1M input impedance, a wide variety of triggering options, and tight synchronization capability, all maximizing convenience of use. Features High Density Simultaneous 8-CH Data Streaming PXI Express specification Rev. 1.0 compliant Benefiting from PXIe architecture, the PXIe-9848 easily Up to 100 MS/s sampling rate manages simultaneous 8-CH data streaming. Users can 8 simultaneously analog inputs synchronize multiple PXIe-9848 digitizers to mount a High resolution 14-bit ADC test system providing up to 64 channels in a single 9-slot Up to 100 MHz bandwidth for analog input Equipped with ADLINK PXES-2590 PXIe chassis and PXIe-9848 modules, PXI Express chassis. high density testing system with up to 64 channels can be implemented. 512 MB onboard storage memory Note: For PXES-2590 details, please refer to pages 1-13. Programmable input voltage range of 0.2 V or 2 V, Extra Buffering or 100 V Max (PXIe-9848H) The PXIe-9848 provides built-in memory up to 512 MB for massive data storage, enabling users to extend Scatter-Gather DMA data transfer for high speed data streaming acquisition for preset durations. One external digital trigger input Full auto-calibration x15/x50 Signal Conditioning Module of PXIe-9848H The PXIe-9848Hs signal conditioning module provides Supported Operating System 8 simultaneous analog inputs and 15:1 or 50:1 attenua- Windows 7/8 x64/x86, Linux tion ratio, implemented with solid product design and Driver and SDK strict verification testing to ensure maximum perfor- LabVIEW, MATLAB, C/C++, Visual Basic, Visual Studio.NET mance, thereby enabling the high dynamic performance of 63.5 dB SFDR and 55.5 dB SINAD while supporting high input voltage range of 100V. PXIe-9848H IO connector definition Specifications TRG IN Analog Input CH0 Number of channels: 8 single-ended CH1 Input impedance: 50 or 1M, software selectable CH2 Input Coupling: AC or DC, software selectable CH3 Input signal range: 0.2 V or 2 V, CH4 or 100 V Max (PXIe-9848H) CH5 Overvoltage protection: 5 V CH6 ADC resolution: 14 bits, 1 in 16384 CH7 Crosstalk: from DC to 1 MHz, for all input ranges PXIe-9848 PXIe-9848H Typical values are measured using 1 MHz sine wave input with amplitude at -1dB of full scale on a 2V range. Acquired data <-80dB <-60dB lengths are in 64k points at 100 MS/s sampling rate, calculated -3 dB bandwidth: with Hanning window FFT. PXIe-9848 PXIe-9848H (15:1) PXIe-9848H (50:1) 100MHz 45 MHz 35 MHz 2-11 www.adlinktech.com Updated September 23, 2014. 2014 ADLINK Technology, Inc. All Rights Reserved. All specifications are subject to change without further notice.Digitizers Offset error: Timebase Sample clock source PXIe-9848 PXIe-9848H Internal: on-board clock (oscillator) <1 mV <2mV External: PXI CLK10 or PXIe CLK100 Gain error: Timebase frequency: 100 MHz PXIe-9848 PXIe-9848H Sampling rate: 100 MS/s to 1025.9 S/s <0.5% <1% Internal timebase accuracy: < 25 ppm System noise: Standard Deviation Data Storage and Transfer 512 MB onboard memory, shared among the eight analog inputs Impedance PXIe-9848 PXIe-9848H (15:1) PXIe-9848H (50:1) (64 MB/per channel) 1M <18LSB <38 LSB < 25 LSB Scatter-Gather DMA data transfer 50 <15LSB Not supported Not supported Onboard Reference Spectral Characteristics +2.5 V onboard reference voltage Sampling rate: 100MS/s, 1MHz -1dBFS input signal < 3.0 ppm/C reference temperature drift 15 minutes recommended warm-up PXIe-9848 PXIe-9848H (15:1) PXIe-9848H (50:1) SINAD 65 dB 55 dB 58 dB General Specifications SNR 66 dB 55 dB 58 dB I/O Connector: THD -72 dB -75 dB -78 dB SMB x 8 for analog inputs ENOB 10.58 bits 9.0 bits 9.5 bits SMB x 1 for external digital input SFDR 74 dB 59 dB 68 dB Dimensions (not including connectors): Passband flatness: DC to 10MHz (without 20MHz digital filter) 160 (W) x 100 (H) mm (6.24 x 3.9) (PXIe-9848) 271.24 (W) x 100 (H) mm (10.57 x 3.9) (PXIe-9848H) Impedance PXIe-9848 PXIe-9848H (15:1) PXIe-9848H (50:1) Bus Interface: 1M < 1 dB < 0.4 dB < 0.4 dB PCI Express gen 1 x4 50 < 0.2 dB Not supported Not supported Ambient Temperature (Operational): Additional Characteristics for Attenuator 0C to 55C (32F to 131F) Impedance 15:1 50:1 Ambient Temperature (Storage): 1M 1M 920k -20C to 80C (-4F to 176F) 50 13.75pF 15pF Relative Humidity: 10% to 90%, non-condensing Trigger Power consumption: Trigger Source Power Rail Standby current (mA) Full load (mA) Software +3.3 V 5350 5900 External digital trigger +12 V 470 500 Analog trigger from CH0 ~ CH7 PXI STAR Certifications PXI trigger bus 0..7 EMC/EMI: CE, FCC Class A PXIe DSTARB Trigger Modes Post-trigger Pre-trigger Ordering Information Middle trigger Delay trigger PXIe-9848 8-CH 14-Bit 100 MS/s High-Speed PXI Express Digitizer External Digital Trigger Input Source: Front panel SMB connector PXIe-9848H Configurable threshold: 0.8 mV to 3.3 V, default 1.67 V 8-CH 14-Bit 100 MS/s High Speed PXI Express Digitizer with x15/x50 attenuator Maximum input overload: -0.5 V to +5.5 V Trigger polarity: rising or falling edge Pulse width: 20 ns minimum 2-12 Updated September 23, 2014. 2014 ADLINK Technology, Inc. All Rights Reserved. All specifications are subject to change without further notice. www.adlinktech.com