AS1355 300mA, Triple LDO 1 General Description Accuracy: 1.0% The AS1355 is a high-performance triple CMOS low-dropout voltage PSRR: 70dB at 1kHz, 60dB at 100kHz regulator in a single QFN package. The efficient set of Load Regulation: 3mV (0 to 300mA) programmable power supplies is optimized to deliver the best compromise between quiescent current and regulator performance Supply Range: 2.3V to 5.5V for mobile phones, PDAs, MP3 players, and other battery powered 0.1V Dropout Voltage Iload = 200mA devices. Shutdown Current: 1A Stability is guaranteed with ceramic output capacitors of only 1F (20% X5R) up to 4.7F (20% X5R). The low equivalent series Supply Current Without Load: 160A resistance (ESR) of these capacitors ensures low output impedance Softstart for Low Inrush Current at high frequencies. Stable with low ESR Ceramic Capacitors from 1F to 4.7F Regulation performance is excellent even under low dropout conditions, when the power transistor has to operate in linear mode. Low Noise: 40V rms 10Hz to 100kHz Bandwidth The low-noise performance allows direct connection of noise Thermal Protection sensitive circuits without additional filtering networks. Over-Current Protection The AS1355 is available in a 16-pin QFN 3x3 package. Temperature Range: -40C to +85C Packages: - 16-pin QFN 3x3 2 Key Features - 16-pin TQFN 3x3 3 Independent Voltage Regulators with Shutdown Output Current: 300mA each LDO 3 Applications Programmable Output Voltage Range: 1.25V to 3.6V in 50mV The AS1355 is ideal for cordless and mobile phones, MP3 players, Steps CD and DVD players, PDAs, hand-held computers, digital cameras, and any other hand-held battery-powered device. Figure 1. AS1355 - Typical Application Diagram VDD1 VOUT1 3.3V +5V 1F VDD2 VOUT2 1.8V 1F 1F VOUT3 VDD3 1.5V AS1355 1F REF VDDA C = 100nF REF (Improved Noise Performance) EN1 EN2 GND P EN3 www.ams.com/LDOs/AS1355 Revision 1.3 1 - 12AS1355 Datasheet - Pin Assignments 4 Pin Assignments Figure 2. Pin Assignments (Top View) EN2 EN3 NC REF 16 15 14 13 EN1 1 12 GND VDDA GND 2 11 AS1355 VDD1 NC 3 10 17 VDD2 4 9 VDD3 5 6 7 8 VOUT1 VOUT2 VOUT3 NC 4.1 Pin Descriptions Table 1. Pin Descriptions Pin Number Pin Name Description 1EN1 Active-High Enable Input 1. Pull this pin to GND to disable the regulated output voltage VOUT1. 2VDDA Analog Power Supply Voltage 3VDD1 Unregulated Input Voltage 1 4VDD2 Unregulated Input Voltage 2 5VOUT1 Regulated Output Voltage 1 6VOUT2 Regulated Output Voltage 2 7VOUT3 Regulated Output Voltage 3 8NC Not Connected 9VDD3 Unregulated Input Voltage 3 10 NC Not Connected Ground. 11, 12 GND Note: All GND pins must be connected together externally. Reference Voltage. 13 REF Note: Connect to a 100nF capacitor during normal operation. 14 NC Not Connected 15 EN3 Active-High Enable Input 3. Pull this pin to GND to disable the regulated output voltage VOUT3. 16 EN2 Active-High Enable Input 2. Pull this pin to GND to disable the regulated output voltage VOUT2. 17 NC Exposed Pad. This pad is not connected internally, it can be connected to GND. www.ams.com/LDOs/AS1355 Revision 1.3 2 - 12