73M1866B/73M1966B MicroDAA with PCM Highway DATA SHEET Simplifying System Integration DS 1x66B 001 April 2010 DESCRIPTION Through its PCM interface, the 73M1966B can be connected to other PCM enabled devices The 73M1866B and 73M1966B use the Teridian such as POTS codecs, ISDN codecs, E1/T1 patented Data Access Arrangement function framers, etc. (MicroDAA ) designed exclusively for Foreign- Exchange-Office (FXO) in Voice-over-IP (VoIP) Additional DAA functions supported by the applications. These devices provide much of the 73M1x66B devices include a call progress circuitry required to connect PCM formatted monitor, Caller ID Type I and II, ring detection, voice channels to a PSTN via a two-wire twisted pulse dialing, billing tone detection and polarity pair interface. The package options provide the reversal detection. necessary functional programmability and protection required for easy worldwide APPLICATIONS homologation. Computer Telephony The family of devices consists of the 73M1866B VOIP Equipment and the 73M1966B. The 73M1866B MicroDAA PBX Systems is the worlds first single-package silicon Data Internet Appliances Access Arrangement (DAA). Suitable Voicemail Systems applications for the 73M1866B and 73M1966B POTS Termination Equipment devices include VoIP equipment that must provide connectivity to the PSTN for purposes of FEATURES guaranteeing emergency service calling, redundancy for supplementary connectivity for PCM highway data interface supporting both voice, and maintenance services. slave and master modes PCM highway interface supporting both E-1 The 73M1966B device set consists of the and T-1 73M1906B Host-Side Device that provides digital SPI control interface, with daisy chain data, control interfaces and power to the support for up to 16 devices 73M1916 Line-Side Device. Designed to meet global DAA compliance These devices are based on an innovative and FCC, ETSI ES 203 021-2, JATE and other patented technology, which sets new standards PTT standards. in reliability and cost. A small pulse transformer 8 kHz and 16 kHz sample rates forms a digital isolation barrier, transferring both 16-bit linear mode power and data to the PSTN line-side TX and RX gains adjustable in 0.125 dB components. This method results in reliable increments operation in the presence of EMI and a tolerance -Law, A-law ITU-T Recommendation G.711 to line voltage variations by providing power to compliant compander operation the Line-Side Device across the barrier. The Automatic clock rate detection devices also support the ability to provide up to Low power modes an additional +6 dB of analog gain to the line- Polarity Reversal detection side transmit and +3 dB in the receive signal GPIO for user-configurable I/O ports paths. The device supports transmit and receive Call Progress Monitor digital gain ranging from 18 dB to +7.375 dB by Isolation up to 6 kV increments of 0.125 dB. THD -80 dB The digital side provides a PCM highway 5 V tolerant I/O on selected pins interface with automatic clock rate detection. 3.0 V 3.6 V operating voltage With an 8-kHz sampling rate, the devices include Industrial temperature range (-40 C to +85 C) an ITU-T G.711 compliant codec with selectable 5x5 mm 32-pin QFN or 20-pin TSSOP -law and A-law companding modes. The packages devices also provide a 16-bit linear mode, which RoHS compliant (6/6) lead-free package is suitable for interfacing with wide band codecs, as well as 16 kHz sampling rate. Device control is performed over an SPI interface. The SPI supports daisy chain operation. Rev. 1.6 2010 Teridian Semiconductor Corporation 1 73M1866B/73M1966B Data Sheet DS 1x66B 001 Table of Contents 1 Introduction ................................................................................................................................... 6 2 Pinout ............................................................................................................................................. 8 2.1 73M1906B 20-Pin TSSOP Pinout ............................................................................................ 8 2.2 73M1916 20-Pin TSSOP Pinout .............................................................................................. 9 2.3 73M1906B 32-Pin QFN Pinout .............................................................................................. 10 2.4 73M1916 32-Pin QFN Pinout ................................................................................................ 12 2.5 73M1866B Pinout ................................................................................................................. 14 2.6 Requisite Use of Exposed Bottom Pad on 73M1866B and 73M1966B QFN Packages .......... 15 3 Electrical Characteristics and Specifications............................................................................. 16 3.1 Isolation Barrier Characteristics ............................................................................................. 16 3.2 Electrical Specifications......................................................................................................... 16 3.2.1 Absolute Maximum Ratings ....................................................................................... 16 3.2.2 Recommended Operating Conditions ........................................................................ 16 3.2.3 DC Characteristics..................................................................................................... 17 3.3 Interface Timing Specification................................................................................................ 18 3.3.1 SPI Interface ............................................................................................................. 18 3.3.2 PCM Highway Interface ............................................................................................. 19 3.4 Analog Specifications ............................................................................................................ 20 3.4.1 DC Specifications ...................................................................................................... 20 3.4.2 Call Progress Monitor ................................................................................................ 21 3.5 73M1x66B Line-Side Electrical Specifications (73M1916) ...................................................... 22 3.6 Reference and Regulation ..................................................................................................... 23 3.7 DC Transfer Characteristics .................................................................................................. 23 3.8 Transmit Path ....................................................................................................................... 24 3.9 Receive Path ........................................................................................................................ 25 3.10 Transmit Hybrid Cancellation ................................................................................................ 26 3.11 Receive Notch Filter .............................................................................................................. 26 3.12 Detectors .............................................................................................................................. 27 3.12.1 Over-Voltage Detector ............................................................................................... 27 3.12.2 Over-Current Detector ............................................................................................... 27 3.12.3 Under-Voltage Detector ............................................................................................. 27 3.12.4 Over-Load Detector ................................................................................................... 27 4 Applications Information ............................................................................................................. 28 4.1 Example Schematic of the 73M1966B and 73M1866B .......................................................... 28 4.2 Bill of Materials...................................................................................................................... 30 4.3 Over-Voltage and EMI Protection .......................................................................................... 31 4.4 Isolation Barrier Pulse Transformer ....................................................................................... 32 5 SPI Interface ................................................................................................................................. 33 6 Control and Status Registers ...................................................................................................... 37 7 Hardware Control Functions ....................................................................................................... 41 7.1 Device Revision .................................................................................................................... 41 7.2 Interrupt Control .................................................................................................................... 41 7.3 Power Management .............................................................................................................. 42 7.4 Device Clock Management.................................................................................................... 42 7.5 GPIO Registers ..................................................................................................................... 43 7.6 Call Progress Monitor ............................................................................................................ 44 7.7 16 kHz Operation of Call Progress Monitor ............................................................................ 44 7.8 Device Reset ........................................................................................................................ 44 8 PCM Highway Interface and Signal Processing ......................................................................... 45 8.1 PCM Highway Interface Timing ............................................................................................. 45 8.2 PCM Clock Frequencies ........................................................................................................ 47 8.3 Master Mode ......................................................................................................................... 47 8.4 A-law / -law Compander ...................................................................................................... 47 2 Rev. 1.6