73S1209F Self-Contained PINpad, Smart Card Reader IC UART to ISO7816 / EMV Bridge IC Simplifying System Integration DATA SHEET December 2008 Embedded Flash memory is in-system programmable GENERAL DESCRIPTION and lockable by means of on-silicon fuses. This makes The Teridian Semiconductor Corporation 73S1209F is a the 73S1209F suitable for both development and versatile and economical CMOS System-on-Chip device production phases. intended for smart card reader applications. More generally, it is suitable anywhere a UART to ISO-7816 / Teridian Semiconductor Corporation offers with its EMV bridge function is needed. The circuit is built around 73S1209F a very comprehensive set of software an 80515 high-performance core it features primarily an libraries for EMV. Refer to the 73S12xxF Software ISO-7816 / EMV interface and a generic asynchronous Users Guide for a complete description of the serial interface. Delivered with turnkey Teridian embedded Application Programming Interface (API Libraries) and firmware, it forms a ready-to-use smart card reader solution related Software modules. that can be seamlessly incorporated into any A complete array of development and programming microprocessor-based system where a serial line is tools, libraries and demonstration boards enable rapid available. development and certification of readers that meet 2 The solution is scalable, thanks to a built-in I C interface most demanding smart card standards. that allows to drive external electrical smart card interfaces such as Teridian 73S8010R/C ICs. This makes the solution APPLICATIONS immediately able to support multi-card slots or multi-SAM UART to ISO-7816 / EMV Bridges architectures. PINpad smart card readers: In addition, the 73S1209F features a 5x6 PINpad interface, o With serial connectivity 9 user I/Os, 2 LED outputs (programmable current), multiple interrupt options and an analog voltage input (for o Ideal for low-cost POS Terminals) & Digital DC voltage monitoring such as battery level detection) that Identification (Secure Login, Govt ID...) make it suitable for low-cost PINpad reader devices. SIM Readers in Telecom & Personal Wireless The 80515 CPU core instruction set is compatible with the devices industry standard 8051, while offering one clock-cycle per Payphones and vending machines instruction processing power (most instructions). With a CPU clock running up to 24MHz, it results in up to 24MIPS General purpose smart card readers available that meets the requirements of various encryption ADVANTAGES needs such as AES, DES / 3-DES and even RSA (for PIN encryption for instance). Reduced BOM The circuit requires a single 6MHz to 12MHz crystal. Low-Cost The respective 73S1209F embedded memories are 32KB Dual power supply required 3.3V and 5V Flash program memory, 2KB user XRAM memory, and typical 256B IRAM memory. Dedicated FIFOs for the ISO7816 Higher performance CPU core (up to 24MIPS) UART are independent from the user XRAM and IRAM. Built-in EMV/ISO slot, expandable to multi- Alternatively to the turnkey firmware offered by Teridian, slots customers can develop their own embedded firmware Powerful In-Circuit Emulation and directly within their application or using Teridian 73S1209F Programming Evaluation Board through a JTAG-like interface. A complete set of EMV4.1 / ISO-7816 Overall, the Teridian 73S1209F IC requires 2 distinct power libraries supply voltages to operate normally with full support of all Turnkey PC/SC and CCID firmware and host smart card voltages, 1.8V, 3V and 5V. The digital power drivers supply V requires a 2.7V to 3.6V voltage, and the analog DD TM power supply V requires typically a 4.75V to 6.0V. PC o Supported OS: Windows XP, Windows While the V is used to power up the CPU core and the Mobile Windows CE Linux DD digital functions of the IC, the V voltage is used to supply PC o Other OS: Contact Teridian Semiconductor the proper V voltage to the smart card interface: The chip CC incorporates an low drop-out linear voltage regulator that generates the smart card power-supply V from the power CC supply source V . PC Rev. 1.2 2008 Teridian Semiconductor Corporation 1 73S1209F Data Sheet DS 1209F 004 FEATURES 80515 Core: Communication Interfaces: 1 clock cycle per instruction (most instructions) Full-duplex serial interface (1200bps to 115kbps UART) CPU clocked up to 24MHz 2 I C Master Interface (400kbps) 32kB Flash memory with security 2kB XRAM (User Data Memory) Man-Machine Interface and I/Os: 256 byte IRAM 5x6 Keyboard (hardware scanning, Hardware watchdog timer debouncing and scrambling) Oscillators: (9) User I/Os Up to 2 programmable current outputs (LED) Single low-cost 6MHz to 12MHz crystal An Internal PLL provides all the necessary clocks Voltage Detection: to each block of the system Analog Input (detection range: 1.0V to 2.5V) Interrupts: Operating Voltage: Standard 80C515 4-priority level structure 2.7V to 3.6V Digital power supply 9 different sources of interrupt to the core 4.75 to 5.5V Analog, smart card power supply Power Down Modes: Operating Temperature: 2 standard 80C515 Power Down and IDLE modes -40C to 85C Extensive device power down mode Package: Timers: 68-pin QFN, 44-pin QFN (2) Standard 80C52 timers T0 and T1 Software: (1) 16-bit timer Turnkey firmware: Built-in ISO-7816 Card Interface: o Compliant with PC/SC, CCID, ISO7816 Linear regulator produces VCC for the card and EMV4.1 specifications (1.8V, 3V or 5V) o Features a Power Down mode accessible form the host Full compliance with EMV 4.1 o Supports Plug & Play over serial interface Activation/Deactivation sequencers o Windows XP driver available (*) Auxiliary I/O lines (C4 and C8 signals) o Windows CE / Mobile driver available (*) 7kV ESD protection on all interface pins o Linux and other OS: Upon request Communication with Smart Cards: Or for custom developments: ISO-7816 UART for protocols T=0, T=1 o A complete set of ISO-7816, EMV4.1 and (2) 2-Byte FIFOs for transmit and receive low-level libraries are available for T=0 / T=1 Configured to drive multiple external Teridian o Two-level Application Programming 73S8010x interfaces (for multi-SAM Interface (ANSI C-language libraries) architectures) (*) Contact Teridian Semiconductor for conditions and availability 2 Rev. 1.2