78P2351-IGT/F Analog Devices

78P2351 Single Channel OC-3/ STM1-E/ E4 LIU DATA SHEET SEPTEMBER 2006 DESCRIPTION FEATURES The 78P2351 is Teridians second generation Line ITU-T G.703 compliant cable driver for 139.264 Interface Unit (LIU) for 155 Mbps (OC-3, STS-3, or Mbps or 155.52 Mbps CMI-coded coax STM-1) and 140 Mbps PDH (E4) telecom interfaces. transmission The device is a single chip solution that includes an Integrated adaptive CMI equalizer and CDR in integrated CDR in the transmit path for flexible NRZ receive path handles over 12.7dB of cable loss to CMI conversion. Serial, LVPECL-compatible system interface with integrated CRU in transmit path for flexible The device can interface to 75 coaxial cable using NRZ to CMI conversion. CMI coding or directly to a fiber optics transceiver 4-bit parallel CMOS system interface with module using NRZ coding. The 78P2351 is master and slave Tx clock modes. compliant with all respective ANSI, ITU-T, and Selectable LVPECL compatible NRZ media Telcordia standards for jitter tolerance, generation, interface for 155.52 Mbps optical transmission. and transfer. Configurable via HW control pins or 4-wire serial interface APPLICATIONS Compliant with ANSI T1.105.03-1994 ITU-T G.751, G.813, G.823, G.825, G.958 and Central Office Interconnects Telcordia GR-253-CORE for jitter performance. DSLAMs Receiver Loss of Signal (LOS) detection Add Drop Multiplexers (ADMs) compatible with ITU-T G.783 PDH/SDH test equipment Operates from a single 3.3V supply Multi Service Switches 100-pin JEDEC LQFP Digital Microwave Radios BLOCK DIAGRAM Lock Detect ECLP/N TXCKP/N SIDP/N Tx CDR FIFO CMI Encoder CMI2P/N SICKP/N CMIP/N PICK PI 3:0 D PMOD, SMOD 1:0 , PAR PTOCK RLBK, RDSL SOCKP/N SODP/N CMI Rx CDR Decoder Adaptive RXP/N PO 3:0 D Eq. Lock Detect POCK LOS Detect CMI LLBK Page: 1 of 42 2006 Teridian Semiconductor Corporation Rev. 2.4 78P2351 Single Channel OC-3/ STM1-E/ E4 LIU TABLE OF CONTENTS .................................................................................................2 FUNCTIONAL DESCRIPTION........................................................................................4 MODE SELECTION................................................................................................................................4 REFERENCE CLOCK ............................................................................................................................4 RECEIVER OPERATION .......................................................................................................................4 Receiver Monitor Mode ..................................................................................................................4 Receive Loss of Signal ..................................................................................................................5 Receive Loss of Lock.....................................................................................................................5 TRANSMITTER OPERATION................................................................................................................5 Synchronous (Re-timing) Tx Serial Modes ..................................................................................5 Plesiochronous Tx Serial Modes ..................................................................................................6 Synchronous Parallel Modes ........................................................................................................6 Transmit FIFO Description ............................................................................................................6 Transmit Driver ...............................................................................................................................7 Transmit Monitor Mode..................................................................................................................7 Clock Synthesizer...........................................................................................................................7 Transmit Backplane Equalizer ......................................................................................................7 Transmit Loss of Lock ...................................................................................................................7 POWER-DOWN FUNCTION .................................................................................................................7 LOOPBACK MODES .............................................................................................................................8 POWER-ON RESET ..............................................................................................................................8 SERIAL CONTROL INTERFACE .........................................................................................................9 PROGRAMMABLE INTERRUPTS ........................................................................................................9 REGISTER DESCRIPTION...........................................................................................10 REGISTER ADDRESSING...................................................................................................................10 REGISTER TABLE...............................................................................................................................10 LEGEND ...............................................................................................................................................11 GLOBAL REGISTERS .........................................................................................................................11 ADDRESS 0-0: MASTER CONTROL REGISTER.......................................................................11 ADDRESS 0-1: INTERRUPT CONTROL REGISTER..................................................................12 ADDRESS 0-2: I/O CONTROL REGISTER .................................................................................12 PORT-SPECIFIC REGISTERS ............................................................................................................13 ADDRESS 1-0: MODE CONTROL REGISTER ...........................................................................13 ADDRESS 1-1: SIGNAL CONTROL REGISTER.........................................................................14 ADDRESS 1-2: ADVANCED TX CONTROL REGISTER 1 .........................................................15 ADDRESS 1-3: ADVANCED TX CONTROL REGISTER 0 .........................................................15 ADDRESS 1-4: MODE CONTROL REGISTER 2 ........................................................................15 ADDRESS 1-5: STATUS MONITOR REGISTER.........................................................................16 Page: 2 of 42 2006 Teridian Semiconductor Corporation Rev. 2.4