SigmaDSP 3-Channel, 26-Bit a Signal Processing DAC AD1953 FEATURES APPLICATIONS 5 V 3-Channel Audio DAC System 2.0/2.1 Channel Audio Systems (2 Main Channels Digital Audio Output (2-Channel or 6-Channel Plus Subwoofer) Packed Mode) Multichannel Automotive Sound Systems Accepts Sample Rates up to 48 kHz Multimedia Audio 7 Biquad Filter Sections per Channel Mini Component Stereo Dual Dynamic Processor with Arbitrary Input/Output Home Theater Systems (AC-3 Postprocessor) Curve and Adjustable Time Constants Musical Instruments 0 ms to 6 ms Variable Delay/Channel for Speaker Alignment In-Seat Sound Systems (Aircraft, Motor Coaches) Stereo Spreading Algorithm for Phat Stereo Effect Program RAM Allows Complete New Program Download PRODUCT OVERVIEW via SPI Port The AD1953 is a complete 26-bit, single-chip, 3-channel digital Parameter RAM Allows Complete Control of More Than audio playback system with built-in DSP functionality for speaker 200 Parameters via SPI Port equalization, dual-band compression/limiting, delay compensa- SPI Port Features Safe-Upload Mode for Transparent tion, and image enhancement. These algorithms can be used to Filter Updates compensate for real-world limitations of speakers, amplifiers, 2 Control Registers Allow Complete Control of Modes and listening environments, resulting in a dramatic improvement and Memory Transfers of perceived audio quality. Differential Output for Optimum Performance The signal processing used in the AD1953 is comparable to that 112 dB Signal-to-Noise (Not Muted) at 48 kHz Sample found in high end studio equipment. Most of the processing is Rate (A-Weighted Stereo) done in full 48-bit double-precision mode, resulting in very good 70 dB Stop-Band Attenuation low level signal performance and the absence of limit cycles or On-Chip Clickless Volume Control idle tones. The compressor/limiter uses a sophisticated two-band Hardware and Software Controllable Clickless Mute algorithm often found in high end broadcast compressors. Digital De-emphasis Processing for 32 kHz, 44.1 kHz, 48 kHz (continued on page 9) Sample Rates Flexible Serial Data Port with Right-Justified, Left-Justified, 2 I S Compatible, and DSP Serial Port Modes Auxiliary Digital Input Graphical Custom Programming Tools 48-Lead LQFP Plastic Package FUNCTIONAL BLOCK DIAGRAM SERIAL DATA 3 OUTPUT 3 AD1953 3 AUDIO DATA SERIAL DATA MUX INPUTS DAC L 26 22 3 DSP CORE MASTER CLOCK ANALOG OUTPUT DATA FORMAT: DAC R OUTPUTS 3.23 (SINGLE PRECISION) 3.45 (DOUBLE PRECISION) MCLK MASTER MCLK GENERATOR CLOCK INPUTS MUX DAC SW (256/512 f ) S AUX SERIAL DATA INPUT DATA CAPTURE DIGITAL SPI DATA OUT/TDM OUT OUTPUT OUTPUT SERIAL CONTROL INTERFACE 3 SPI INPUT RAM ROM REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. may result from its use. No license is granted by implication or otherwise Tel: 781/329-4700 www.analog.com under any patent or patent rights of Analog Devices. Trademarks and 781/461-3113 2014 registered trademarks are the property of their respective companies. Fax: Analog Devices, Inc. All rights reserved.AD1953 TABLE OF CONTENTS FEATURES . 1 Post-Compression Gain 17 APPLICATIONS . 1 Subwoofer Compressor/Limiter 17 PRODUCT OVERVIEW . 1 De-Emphasis Filtering . 18 FUNCTIONAL BLOCK DIAGRAM . 1 Using the Sub Reinjection Paths for Systems with No SPECIFICATIONS . 3 Subwoofer 18 ABSOLUTE MAXIMUM RATINGS . 6 Interpolation Filters . 18 ORDERING GUIDE 34 SPI PORT 18 Package Characteristics . 6 Overview . 18 PIN CONFIGURATION . 6 SPI Address Decoding . 19 PIN FUNCTION DESCRIPTIONS 7 Control Register 1 21 TYPICAL PERFORMANCE CHARACTERISTICS . 8 Control Register 2 22 PERFORMANCE PLOTS 8 Volume Registers . 23 PRODUCT OVERVIEW . 9 Parameter RAM Contents 23 Features . 9 Options for Parameter Updates 24 Pin Functions . 10 Soft Shutdown Mechanism . 25 SIGNAL PROCESSING 12 Safeload Mechanism 25 Signal Processing Overview . 12 Summary of RAM Modes 25 Numeric Formats 13 SPI READ/WRITE DATA FORMATS . 26 Coefficient Format . 13 INITIALIZATION . 27 Internal DSP Signal Data Format 13 Power-Up Sequence 27 High-Pass Filter 13 Setting the Clock Mode 27 Biquad Filters . 13 Setting the Data and MCLK Input Selectors 28 Volume 14 DATA CAPTURE REGISTERS AND OUTPUTS 28 Stereo Image Expander 14 SERIAL DATA INPUT/OUTPUT PORTS 30 Delay 15 Serial Data Input/Output Modes . 30 Main Compressor/Limiter 15 DIGITAL CONTROL PIN 31 RMS Time Constant 17 Mute 31 RMS Hold Time . 17 ANALOG OUTPUT SECTION 31 RMS Release Rate 17 GRAPHICAL CUSTOM PROGRAMMING TOOLS 32 Look-Ahead Delay 17 APPENDIX . 33 OUTLINE DIMENSIONS . 34 REVISION HISTORY 12/14Rev. 0 to Rev. A Changes to Signal Processing Overview Section ........................ 12 Changes to Graphical Custom Programming Tools Section..... 32 Updated Outline Dimensions ........................................................ 34 Changes to Ordering Guide ........................................................... 34 4/03Revision 0: Initial Version REV. A 2