A1 W1 B1 A2 W2 B2 2 Dual Channel, 128-/256-Position, I C, Nonvolatile Digital Potentiometer Data Sheet AD5122A/AD5142A FEATURES FUNCTIONAL BLOCK DIAGRAM V V LOGIC DD INDEP 10 k and 100 k resistance options Resistor tolerance: 8% maximum POWER-ON RESET AD5122A/ Wiper current: 6 mA AD5142A Low temperature coefficient: 35 ppm/C Wide bandwidth: 3 MHz RDAC1 Fast start-up time < 75 s RESET INPUT REGISTER 1 Linear gain setting mode SCL SERIAL Single- and dual-supply operation RDAC2 INTERFACE SDA 7/8 Independent logic supply: 1.8 V to 5.5 V INPUT REGISTER 2 ADDR1 Wide operating temperature: 40C to +125C 3 mm 3 mm package option EEPROM ADDR0 MEMORY Qualified for automotive applications APPLICATIONS GND V SS Portable electronics level adjustment Figure 1. LCD panel brightness and contrast controls Programmable filters, delays, and time constants Programmable power supplies GENERAL DESCRIPTION The AD5122A/AD5142A potentiometers provide a nonvolatile Table 1. Family Models solution for 128-/256-position adjustment applications, offering Model Channel Position Interface Package guaranteed low resistor tolerance errors of 8% and up to 6 mA 1 2 AD5123 Quad 128 I C LFCSP current density in the Ax, Bx, and Wx pins. 2 AD5124 Quad 128 SPI/I C LFCSP The low resistor tolerance and low nominal temperature coefficient AD5124 Quad 128 SPI TSSOP 1 2 simplify open-loop applications as well as applications requiring AD5143 Quad 256 I C LFCSP 2 tolerance matching. AD5144 Quad 256 SPI/I C LFCSP AD5144 Quad 256 SPI TSSOP The linear gain setting mode allows independent programming 2 AD5144A Quad 256 I C TSSOP of the resistance between the digital potentiometer terminals, AD5122 Dual 128 SPI LFCSP/TSSOP through R and R the string resistors, allowing very accurate AW WB 2 AD5122A Dual 128 I C LFCSP/TSSOP resistor matching. AD5142 Dual 256 SPI LFCSP/TSSOP The high bandwidth and low total harmonic distortion (THD) 2 AD5142A Dual 256 I C LFCSP/TSSOP ensure optimal performance for ac signals, making it suitable 2 AD5121 Single 128 SPI/I C LFCSP for filter design. 2 AD5141 Single 256 SPI/I C LFCSP The low wiper resistance of only 40 at the ends of the resistor 1 Two potentiometers and two rheostats. array allows for pin-to-pin connection. 2 The wiper values can be set through an I C-compatible digital interface that is also used to read back the wiper register and EEPROM contents. The AD5122A/AD5142A are available in a compact, 16-lead, 3 mm 3 mm LFCSP and a 16-lead TSSOP. The parts are guaranteed to operate over the extended industrial temperature range of 40C to +125C. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20122017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 10939-001AD5122A/AD5142A Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 RDAC Register and EEPROM .................................................. 20 Applications ....................................................................................... 1 Input Shift Register .................................................................... 20 2 Functional Block Diagram .............................................................. 1 I C Serial Data Interface ............................................................ 20 2 General Description ......................................................................... 1 I C Address .................................................................................. 20 Revision History ............................................................................... 2 Advanced Control Modes ......................................................... 22 Specifications ..................................................................................... 3 EEPROM or RDAC Register Protection ................................. 23 Electrical CharacteristicsAD5122A ....................................... 3 INDEP Pin ................................................................................... 23 Electrical CharacteristicsAD5142A ....................................... 6 RDAC Architecture .................................................................... 26 Interface Timing Specifications .................................................. 9 Programming the Variable Resistor ......................................... 26 Shift Register and Timing Diagrams ....................................... 10 Programming the Potentiometer Divider ............................... 27 Absolute Maximum Ratings .......................................................... 11 Terminal Voltage Operating Range ......................................... 27 Thermal Resistance .................................................................... 11 Power-Up Sequence ................................................................... 27 ESD Caution ................................................................................ 11 Layout and Power Supply Biasing ............................................ 27 Pin Configurations and Function Descriptions ......................... 12 Outline Dimensions ....................................................................... 28 Typical Performance Characteristics ........................................... 14 Ordering Guide .......................................................................... 29 Test Circuits ..................................................................................... 19 Automotive Products ................................................................. 29 Theory of Operation ...................................................................... 20 REVISION HISTORY 6/2017Rev. A to Rev. B Changes to Figure 18 ...................................................................... 16 Changes to Features Section............................................................ 1 Change to Linear Gain Setting Mode .......................................... 22 Changes to Logic Supply Current Parameter, Table 2 ................. 4 Changes to EEPROM or RDAC Register Protection Section ... 23 Added Note 12 to Data Retention Parameter, Table 2 Changes to RDAC Architecture Section ..................................... 26 Renumbered Sequentially ................................................................ 5 Updated Outline Dimensions ....................................................... 28 Changes to Logic Supply Current Parameter, Table 3 ................. 7 Changes to Ordering Guide .......................................................... 29 Added Note 12 to Data Retention Parameter, Table 3 Added Automotive Products Section .......................................... 29 Renumbered Sequentially ................................................................ 8 12/2012Rev. 0 to Rev. A Changes to Table 5 .......................................................................... 11 Changes to Figure 4 and Table 7 ................................................... 12 Changes to Table 9 .......................................................................... 20 Changes to Figure 14 ...................................................................... 15 Added Figure 15 Renumbered Sequentially .............................. 15 10/2012Revision 0: Initial Version Rev. B Page 2 of 32