A1 W1 B1 A2 W2 B2 Dual Channel, 128-/256-Position, SPI, Nonvolatile Digital Potentiometer Data Sheet AD5122/AD5142 FEATURES FUNCTIONAL BLOCK DIAGRAM V V LOGIC DD INDEP 10 k and 100 k resistance options Resistor tolerance: 8% maximum POWER-ON RESET AD5122/ Wiper current: 6 mA AD5142 Low temperature coefficient: 35 ppm/C Wide bandwidth: 3 MHz RDAC1 Fast start-up time <75 s RESET INPUT REGISTER 1 Linear gain setting mode SCLK SERIAL Single- and dual-supply operation RDAC2 INTERFACE SDI 7/8 Independent logic supply: 1.8 V to 5.5 V INPUT REGISTER 2 Wide operating temperature: 40C to +125C SYNC 3 mm 3 mm package option EEPROM SDO MEMORY Qualified for automotive applications APPLICATIONS GND V SS Portable electronics level adjustment Figure 1. LCD panel brightness and contrast controls Programmable filters, delays, and time constants Programmable power supplies The AD5122/AD5142 are available in a compact, 16-lead, 3 mm GENERAL DESCRIPTION 3 mm LFCSP and a 16-lead TSSOP. The devices are guaranteed The AD5122/AD5142 potentiometers provide a nonvolatile to operate over the extended industrial temperature range of solution for 128-/256-position adjustment applications, offering 40C to +125C. guaranteed low resistor tolerance errors of 8% and up to 6 mA current density in the Ax, Bx, and Wx pins. Table 1. Family Models The low resistor tolerance and low nominal temperature coefficient Model Channel Position Interface Package 1 2 simplify open-loop applications as well as applications requiring AD5123 Quad 128 I C LFCSP 2 tolerance matching. AD5124 Quad 128 SPI/I C LFCSP AD5124 Quad 128 SPI TSSOP The linear gain setting mode allows independent programming 1 2 AD5143 Quad 256 I C LFCSP of the resistance between the digital potentiometer terminals 2 AD5144 Quad 256 SPI/I C LFCSP through the R and R string resistors, allowing accurate AW WB AD5144 Quad 256 SPI TSSOP resistor matching. 2 AD5144A Quad 256 I C TSSOP The high bandwidth and low total harmonic distortion (THD) AD5122 Dual 128 SPI LFCSP/TSSOP ensure optimal performance for ac signals, making these devices 2 AD5122A Dual 128 I C LFCSP/TSSOP suitable for filter design. AD5142 Dual 256 SPI LFCSP/TSSOP 2 The low wiper resistance of only 40 at the ends of the resistor AD5142A Dual 256 I C LFCSP/TSSOP 2 array allows pin to pin connection. AD5121 Single 128 SPI/I C LFCSP 2 AD5141 Single 256 SPI/I C LFCSP The wiper values can be set through an SPI-compatible digital interface that also reads back the wiper register and EEPROM 1 Two potentiometers and two rheostats. contents. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20122017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 10880-001AD5122/AD5142 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 RDAC Register and EEPROM .................................................. 20 Applications ....................................................................................... 1 Input Shift Register .................................................................... 20 Functional Block Diagram .............................................................. 1 SPI Serial Data Interface ............................................................ 20 General Description ......................................................................... 1 Advanced Control Modes ......................................................... 23 Revision History ............................................................................... 2 EEPROM or RDAC Register Protection ................................. 24 Specifications ..................................................................................... 3 INDEP Pin ................................................................................... 24 Electrical CharacteristicsAD5122 .......................................... 3 RDAC Architecture .................................................................... 27 Electrical CharacteristicsAD5142 .......................................... 6 Programming the Variable Resistor ......................................... 27 Interface Timing Specifications .................................................. 9 Programming the Potentiometer Divider ............................... 28 Shift Register and Timing Diagrams ....................................... 10 Terminal Voltage Operating Range ......................................... 28 Absolute Maximum Ratings .......................................................... 11 Power-Up Sequence ................................................................... 28 Thermal Resistance .................................................................... 11 Layout and Power Supply Biasing ............................................ 28 ESD Caution ................................................................................ 11 Outline Dimensions ....................................................................... 29 Pin Configurations and Function Descriptions ......................... 12 Ordering Guide .......................................................................... 30 Typical Performance Characteristics ........................................... 14 Automotive Products ................................................................. 30 Test Circuits ..................................................................................... 19 Theory of Operation ...................................................................... 20 REVISION HISTORY 5/2017Rev. B to Rev. C Changes to RDAC Architecture Section ..................................... 27 Changes to Figure 6 and Table 8 ................................................... 12 Changes to Ordering Guide .......................................................... 30 Changes to Figure 16 and Figure 17 ............................................. 15 Added Automotive Products Section .......................................... 30 Changes to EEPROM or RDAC Register Protection Section ........ 24 Updated Outline Dimensions ....................................................... 29 2/2016Rev. 0 to Rev. A Changes to Ordering Guide .......................................................... 30 Changes to Features Section ............................................................ 1 Added Endnote, Table 2 ................................................................... 5 6/2016Rev. A to Rev. B Added Endnote, Table 3 ................................................................... 8 Added Endnote, Table 4 ................................................................... 9 Changes to Features Section............................................................ 1 Changes to Logic Supply Current Parameter, Table 2 ................. 4 Changes to Figure 3 Caption and Figure 4 Caption .................. 10 Changes to Logic Supply Current Parameter, Table 3 ................. 7 Changes to Table 6 .......................................................................... 11 Changes to Figure 16 ...................................................................... 15 Changes to Figure 6 ........................................................................ 12 Added Figure 17 Renumbered Sequentially .............................. 15 Changes to Figure 18 ...................................................................... 16 10/2012Revision 0: Initial Version Change to Linear Gain Setting Mode Section ............................ 23 Rev. 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