Precision Instrumentation Amplifier Data Sheet AD524 FEATURES FUNCTIONAL BLOCK DIAGRAM Low noise: 0.3 V p-p at 0.1 Hz to 10 Hz PROTECTION INPUT 1 Low nonlinearity: 0.003% (G = 1) 4.44k High CMRR: 120 dB (G = 1000) AD524 G = 10 13 Low offset voltage: 50 V 404 12 G = 100 V Low offset voltage drift: 0.5 V/C b 20k 40 SENSE G = 1000 11 Gain bandwidth product: 25 MHz 20k 20k Pin programmable gains of 1, 10, 100, 1000 RG 16 1 OUTPUT RG 3 Input protection, power-on/power-off 2 20k 20k 20k No external components required REFERENCE Internally compensated + INPUT 2 PROTECTION MIL-STD-883B and chips available 16-lead ceramic DIP and SOIC packages and 20-terminal Figure 1. leadless chip carrier available Available in tape and reel in accordance with EIA-481A standard Standard military drawing also available GENERAL DESCRIPTION The AD524 is a precision monolithic instrumentation amplifier PRODUCT HIGHLIGHTS designed for data acquisition applications requiring high accu- 1. Guaranteed low offset voltage, low offset voltage drift, and racy under worst-case operating conditions. An outstanding low noise for precision high gain applications. combination of high linearity, high common-mode rejection, 2. Functionally complete with pin programmable gains of 1, low offset voltage drift, and low noise makes the AD524 suitable 10, 100, and 1000, and single resistor-programmable for for use in many data acquisition systems. The AD524 has an any gain. output offset voltage drift of less than 25 V/C, input offset 3. Input and output offset nulling terminals are provided for voltage drift of less than 0.5 V/C, CMR above 90 dB at unity high precision applications and to minimize offset voltage gain (120 dB at G = 1000), and maximum nonlinearity of changes in gain ranging applications. 0.003% at G = 1. The gain bandwidth product of the AD524 is 4. Input protected for both power-on and power-off fault 25 kHz (G = 1000). The output slew rate of 5 V/s and settling conditions. time of 15 s to 0.01% for gains of 1 to 100, makes it suitable for 5. Superior dynamic performance with a gain bandwidth high speed data acquisition systems. product of 25 MHz, full power response of 75 kHz and a As a complete amplifier, the AD524 does not require any external settling time of 15 s to 0.01% of a 20 V step (G = 100). components for fixed gains of 1, 10, 100, and 1000. For other gain settings between 1 and 1000, only a single resistor is required. The AD524 input is fully protected for both power-on and power-off fault conditions. The AD524 is available in four versions of accuracy and operating temperature range. The economical A grade, the low drift B grade, and lower drift, higher linearity C grade are specified from 25C to +85C. The S grade guarantees performance to specification over the extended temperature range 55C to +125C. The AD524 is available in a 16-lead ceramic DIP, 16-lead SBDIP, 16-lead SOIC wide packages, and 20-terminal leadless chip carrier. Rev. G Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 19832018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 00500-001AD524 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Input Offset and Output Offset ................................................ 15 Functional Block Diagram .............................................................. 1 Gain .............................................................................................. 16 General Description ......................................................................... 1 Input Bias Currents .................................................................... 17 Product Highlights ........................................................................... 1 Common-Mode Rejection ........................................................ 17 Revision History ............................................................................... 2 Grounding ................................................................................... 18 Specif icat ions ..................................................................................... 3 Sense Terminal ............................................................................ 18 Absolute Maximum Ratings ............................................................ 8 Reference Terminal .................................................................... 18 Connection Diagrams .................................................................. 8 Programmable Gain ................................................................... 20 ESD Caution .................................................................................. 8 Auto-Zero Circuits ..................................................................... 20 Typical Performance Characteristics ............................................. 9 Error Budget Analysis ................................................................ 21 Test Circuits ................................................................................. 14 References .................................................................................... 23 Theory of Operation ...................................................................... 15 Outline Dimensions ....................................................................... 24 Input Protection .......................................................................... 15 Ordering Guide .......................................................................... 25 REVISION HISTORY 1/2018Rev. F to Rev. G Changes to General Description .................................................... 1 Change to Output Offset Voltage vs. Temperature Parameter, Unit Column, Table 1 ....................................................................... 3 Added References Section ............................................................. 23 Updated Outline Dimensions ....................................................... 24 Changes to Ordering Guide .......................................................... 25 11/2007Rev. E to Rev. F Updated Format .................................................................. Universal Changes to General Description .................................................... 1 Changes to Figure 1 .......................................................................... 1 Changes to Figure 3 and Figure 4 Captions .................................. 8 Changes to Error Budget Analysis Section ................................. 21 Changes to Ordering Guide .......................................................... 25 4/1999Rev. D to Rev. E Rev. G Page 2 of 25