2 Nonvolatile, I C -Compatible 64-Position, Digital Potentiometer Data Sheet AD5258 FEATURES FUNCTIONAL BLOCK DIAGRAMS Nonvolatile memory maintains wiper settings RDAC V DD A 64-position digital potentiometer RDAC V RDAC LOGIC EEPROM W Compact MSOP-10 (3 mm 4.9 mm) REGISTER GND B 2 I C-compatible interface 6 DATA V pin provides increased interface flexibility LOGIC SCL 2 SDA I C CONTROL End-to-end resistance 1 k , 10 k, 50 k, 100 k 6 SERIAL INTERFACE Resistance tolerance stored in EEPROM (0.1% accuracy) AD0 COMMAND Power-on EEPROM refresh time <1 ms DECODE LOGIC AD1 AD5258 ADDRESS Software write protect command DECODE LOGIC POWER- Address Decode Pin AD0 and Address Decode Pin AD1 allow ON RESET CONTROL LOGIC four packages per bus 100-year typical data retention at 55C Figure 1. Block Diagram Wide operating temperature 40C to +85C V V LOGIC DD 3 V to 5 V single supply A APPLICATIONS EEPROM SCL LCD panel VCOM adjustment RDAC 2 REGISTER SDA I C SERIAL AND LCD panel brightness and contrast control AD0 INTERFACE LEVEL SHIFTER AD1 Mechanical potentiometer replacement in new designs W COMMAND DECODE LOGIC Programmable power supplies ADDRESS RF amplifier biasing DECODE LOGIC Automotive electronics adjustment CONTROL LOGIC Gain control and offset adjustment GND B Fiber to the home systems Figure 2. Block Diagram Showing Level Shifters Electronics level settings GENERAL DESCRIPTION The AD5258 provides a compact, nonvolatile 3 mm 4.9 mm of 0.1%. There is also a software write protection function that packaged solution for 64-position adjustment applications. These ensures data cannot be written to the EEPROM register. devices perform the same electronic adjustment function as A separate V pin delivers increased interface flexibility. For LOGIC 1 mechanical potentiometers or variable resistors, but with users who need multiple parts on one bus, Address Bit AD0 and enhanced resolution and solid-state reliability. Address Bit AD1 allow up to four devices on the same bus. 2 The wiper settings are controllable through an I C-compatible 1 The terms digital potentiometer, VR (variable resistor), and RDAC are used digital interface that is also used to read back the wiper register interchangeably. and EEPROM content in addition, resistor tolerance is stored within EEPROM, providing an end-to-end tolerance accuracy Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. 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Technical Support www.analog.com 05029-001 05029-002AD5258 Data Sheet TABLE OF CONTENTS Writing ......................................................................................... 15 Features .............................................................................................. 1 Storing/Restoring ....................................................................... 15 Applications ....................................................................................... 1 Reading ........................................................................................ 15 2 Functional Block Diagrams ............................................................. 1 I C Byte Formats ............................................................................. 16 General Description ......................................................................... 1 Generic Interface ........................................................................ 16 Revision History ............................................................................... 2 Write Modes ................................................................................ 16 Specifications ..................................................................................... 3 Read Modes ................................................................................. 17 Electrical Characteristics ............................................................. 3 Store/Restore Modes .................................................................. 17 Timing Characteristics ................................................................ 5 Tolerance Readback Modes ...................................................... 18 Absolute Maximum Ratings ............................................................ 6 ESD Protection of Digital Pins and Resistor Terminals ........ 19 ESD Caution .................................................................................. 6 Power-Up Sequence ................................................................... 19 Pin Configuration and Function Descriptions ............................. 7 Layout and Power Supply Bypassing ....................................... 19 Typical Performance Characteristics ............................................. 8 Multiple Devices on One Bus ................................................... 19 Test Circuits ..................................................................................... 13 Display Applications ...................................................................... 20 Theory of Operation ...................................................................... 14 Circuitry ...................................................................................... 20 Programming the Variable Resistor ......................................... 14 Outline Dimensions ....................................................................... 21 Programming the Potentiometer Divider ............................... 14 Ordering Guide .......................................................................... 21 2 I C Interface ..................................................................................... 15 REVISION HISTORY 1/13Rev. C to Rev. D 3/07Rev. 0 to Rev. A Changes to Zero-Scale Error Parameter and Logic Supply Updated Format .................................................................. Universal Parameter, Table 1 .............................................................................. 3 Changes to Features Section ............................................................ 1 Removed Evaluation Board Section and Figure 43, Renumbered Changes to General Description Section ....................................... 1 Sequentially ...................................................................................... 19 Changes to Table 4 ............................................................................. 7 2 Changes to I C Interface Section .................................................. 15 5/10Rev. B to Rev. C Changes to Table 5 .......................................................................... 16 Changes to Storing/Restoring Section ......................................... 15 Changes to Multiple Devices on One Bus Section ..................... 19 Changes to Table 7 .......................................................................... 16 3/05Revision 0: Initial Version Changes to Table 14 ........................................................................ 17 1/10Rev. A to Rev. B Changes to Figure 44 ...................................................................... 20 Updated Outline Dimensions ....................................................... 21 Rev. D Page 2 of 24