2.5 V to 5.5 V, 250 A, 2-Wire Interface, Dual Voltage Output, 8-/10-/12-Bit DACs AD5337/AD5338/AD5339 FEATURES GENERAL DESCRIPTION AD5337 The AD5337/AD5338/AD5339 are dual 8-, 10-, and 12-bit 2 buffered 8-bit DACs in 8-lead MSOP buffered voltage output DACs, respectively. Each part is housed AD5338, AD5338-1 in an 8-lead MSOP package and operates from a single 2.5 V to 2 buffered 10-bit DACs in 8-lead MSOP 5.5 V supply, consuming 250 A at 3 V. On-chip output amplifiers AD5339 allow rail-to-rail output swing with a slew rate of 0.7 V/s. A 2- 2 buffered 12-bit DACs in 8-lead MSOP wire serial interface operates at clock rates up to 400 kHz. This Low power operation: 250 A 3 V, 300 A 5 V interface is SMBus compatible at V < 3.6 V. Multiple devices DD 2 2-wire (I C-compatible) serial interface can be placed on the same bus. 2.5 V to 5.5 V power supply The references for the two DACs are derived from one reference Guaranteed monotonic by design over all codes pin. The outputs of all DACs can be updated simultaneously Power-down to 80 nA 3 V, 200 nA 5 V using the software LDAC function. The parts incorporate a 3 power-down modes power-on reset circuit to ensure that the DAC outputs power up Double-buffered input logic to 0 V and remain there until a valid write to the device takes Output range: 0 V to V REF place. A software clear function resets all input and DAC Power-on reset to 0 V registers to 0 V. A power-down feature reduces the current Simultaneous update of outputs (LDAC function) consumption of the devices to 200 nA 5 V (80 nA 3 V). Software clear facility The low power consumption of these parts in normal operation Data readback facility On-chip rail-to-rail output buffer amplifiers makes them ideally suited to portable battery-operated equip- Temperature range: 40C to +105C ment. The power consumption is typically 1.5 mW at 5 V and 0.75 mW at 3 V, reducing to 1 W in power-down mode. APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators Industrial process control FUNCTIONAL BLOCK DIAGRAM V DD REFIN LDAC INPUT DAC STRING SCL BUFFER V A OUT REGISTER REGISTER DAC A INTERFACE SDA LOGIC INPUT DAC STRING BUFFER V B OUT REGISTER REGISTER DAC B A0 POWER-DOWN LOGIC POWER-ON AD5337/AD5338/AD5339 RESET GND Figure 1. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20032007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 03756-001AD5337/AD5338/AD5339 TABLE OF CONTENTS Features .............................................................................................. 1 Output Amplifier........................................................................ 15 Applications....................................................................................... 1 Power-on Reset ........................................................................... 15 General Description ......................................................................... 1 Serial Interface ............................................................................ 16 Functional Block Diagram .............................................................. 1 Write Operation.......................................................................... 17 Revision History ............................................................................... 2 Read Operation........................................................................... 18 Specifications..................................................................................... 3 Double-Buffered Interface ........................................................ 19 AC Characteristics........................................................................ 5 Power-Down Modes .................................................................. 19 Timing Characteristics ................................................................ 6 Applications..................................................................................... 20 Absolute Maximum Ratings............................................................ 7 Typical Application Circuit....................................................... 20 ESD Caution.................................................................................. 7 Bipolar Operation....................................................................... 20 Pin Configuration and Function Descriptions............................. 8 Multiple Devices on One Bus ................................................... 20 Typical Performance Characteristics ............................................. 9 Product as a Digitally Programmable Window Detector ..... 21 Terminology .................................................................................... 13 Coarse and Fine Adjustment Capabilities............................... 21 Theory of Operation ...................................................................... 15 Power Supply Decoupling ......................................................... 21 Digital-to-Analog Converter Section ...................................... 15 Outline Dimensions....................................................................... 24 Resistor String............................................................................. 15 Ordering Guide .......................................................................... 24 DAC Reference Inputs ............................................................... 15 REVISION HISTORY 9/07Rev. B to Rev. C 10/04Rev. 0 to Rev. A Changes to Features.......................................................................... 1 Updated Format..................................................................Universal Changes to Table 4............................................................................ 7 Added AD5338-1................................................................Universal Changes to Ordering Guide .......................................................... 25 Changes to Specifications.................................................................4 Updated Outline Dimensions....................................................... 24 Changes to Ordering Guide .......................................................... 24 9/06Rev. A to Rev. B Updated Format..................................................................Universal Changes to Figure 31...................................................................... 16 11/03Rev. 0: Initial Version Changes to Table 6.......................................................................... 16 Changes to Table 10........................................................................ 23 Changes to Ordering Guide .......................................................... 25 Rev. C Page 2 of 28