Precision, Low Power a BiFET Op Amp AD548 CONNECTION DIAGRAMS FEATURES Plastic Mini-DIP (N) Package Enhanced Replacement for LF441 and TL061 and DC Performance: SOIC (R)Package 200 A max Quiescent Current 10 pA max Bias Current, Warmed Up (AD548C) 250 V max Offset Voltage (AD548C) OFFSET NULL 1 8 NC 2 V/ C max Drift (AD548C) INVERTING 2 V p-p Noise, 0.1 Hz to 10 Hz V+ 2 7 INPUT AC Performance: NONINVERTING 3 6 OUTPUT INPUT 1.8 V/ s Slew Rate 4 OFFSET V AD548 5 1 MHz Unity Gain Bandwidth NULL TOP VIEW Available in Plastic and Hermetic Metal Can Packages and in Chip Form NOTE: PIN 4 CONNECTED TO CASE Available in Tape and Reel in Accordance with NC = NO CONNECT EIA-481A Standard MIL-STD-883B Parts Available Dual Version Available: AD648 10k Surface-Mount (SOIC) Package Available 1 5 4 15V PRODUCT DESCRIPTION V TRIM OS The AD548 is a low power, precision monolithic operational TOP VIEW amplifier. It offers both low bias current (10 pA max, warmed up) and low quiescent current (200 A max) and is fabricated with ion-implanted FET and laser wafer trimming technologies. Input bias current is guaranteed over the AD548s entire common-mode voltage range. PRODUCT HIGHLIGHTS 1. A combination of low supply current, excellent dc and ac The economical J grade has a maximum guaranteed input offset performance and low drift makes the AD548 the ideal op voltage of less than 2 mV and an input offset voltage drift of less amp for high performance, low power applications. than 20 V/C. This level of dc precision is achieved utilizing Analogs laser wafer drift trimming process. The combination of 2. The AD548 is pin compatible with industry standard op low quiescent current and low offset voltage drift minimizes amps such as the LF441, TL061, and AD542, enabling changes in input offset voltage due to self-heating effects. designers to improve performance while achieving a reduction in power dissipation of up to 85%. The AD548 is recommended for any dual supply op amp applica- tion requiring low power and excellent dc and ac performance. 3. Guaranteed low input offset voltage (2 mV max) and drift In applications such as battery-powered, precision instrument (20 V/C max) for the AD548J are achieved utilizing front ends and CMOS DAC buffers, the AD548s excellent com- Analog Devices laser drift trimming technology, eliminating bination of low input offset voltage and drift, low bias current, the need for external trimming. and low 1/f noise reduces output errors. High common-mode 4. Analog Devices specifies each device in the warmed-up rejection (82 dB, min on the B grade) and high open-loop condition, insuring that the device will meet its published gain ensures better than 12-bit linearity in high impedance, specifications in actual use. buffer applications. 5. A dual version, the AD648, is also available. The AD548 is pinned out in a standard op amp configuration 6. Enhanced replacement for LF441 and TL061. and is available in three performance grades. The AD548J and AD548K are rated over the commercial temperature range of 0C to 70C. The AD548B is rated over the industrial tempera- ture range of 40C to +85C. The AD548 is available in an 8-lead plastic mini-DIP and surface-mount (SOIC) packages. REV. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties that Tel: 781/329-4700 www.analog.com may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781/326-8703 Analog Devices, Inc., 2002( 25 C and V = 15 V dc unless otherwise noted.) AD548SPECIFICATIONS S AD548J AD548K/B Parameter Min Typ Max Min Typ Max Unit 1 INPUT OFFSET VOLTAGE Initial Offset 0.75 2.0 0.3 0.5 mV T to T 3.0/3.0/3.0 0.7/0.8 mV MIN MAX vs. Temperature 20 5 V/C vs. Supply 80 86 dB vs. Supply, T to T 76/76/76 80 dB MIN MAX Long-Term Offset Stability 15 15 V/Month INPUT BIAS CURRENT 2 Either Input , V = 0 5 20 3 10 pA CM 2 Either Input at T , V = 0 0.45/1.3/20 0.25/0.65 nA MAX CM Max Input Bias Current Over Common-Mode Voltage Range 30 15 pA Offset Current, V = 0 5 10 2 5 pA CM Offset Current at T 0.25/0.65/10 0.15/0.35 nA MAX INPUT IMPEDANCE 12 12 Differential 1 10 31 10 3 pF 12 12 Common Mode 3 10 33 10 3 pF INPUT VOLTAGE RANGE 3 Differential 20 20 V Common Mode 11 12 11 12 V Common-Mode Rejection V = 10 V 76 90 82 92 dB CM T to T 76/76/76 90 82 92 dB MIN MAX V = 11 V 70 84 76 86 dB CM T to T 70/70/70 84 76 86 dB MIN MAX INPUT VOLTAGE NOISE Voltage 0.1 Hz to 10 Hz 2 2 V p-p f = 10 Hz 80 80 nV/Hz f = 100 Hz 40 40 nV/Hz f = 1 kHz 30 30 nV/Hz f = 10 kHz 30 30 nV/Hz INPUT CURRENT NOISE f = 1 kHz 1.8 1.8 fA/Hz FREQUENCY RESPONSE Unity Gain, Small Signal 0.8 1.0 0.8 1.0 MHz Full Power Response 30 30 kHz Slew Rate, Unity Gain 1.0 1.8 1.0 1.8 V/s Settling Time to 0.01% 8 8 s OPEN LOOP GAIN V = 10 V, R 10 k 300 1000 300 1000 3V/mV O L T to T , R 10 k 300/300/300 700 300 700 V/mV MIN MAX L V = 10 V, R 5 k 150 500 150 500 V/mV O L T to T , R 5 k 150/150/150 300 150 300 V/mV MIN MAX L OUTPUT CHARACTERISTICS Voltage R 10 k , 12 13 12 13 V L T to T 12/12/12 12 MIN MAX Voltage R 5 k , 11 12.3 11 12.3 V L T to T 11/11/11 11 MIN MAX Short Circuit Current 15 15 mA 2 REV. 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