2.7 V to 5.5 V, Serial-Input, Voltage-Output, 12-/16-Bit DAC Data Sheet AD5512A/AD5542A FEATURES FUNCTIONAL BLOCK DIAGRAM V 12-/16-bit resolution DD 1 LSB INL R FB R FB 11.8 nV/Hz noise spectral density INV REFF R INV 1 s settling time 16-BIT DAC V OUT 1.1 nV-sec glitch energy REFS 0.05 ppm/C temperature drift AGNDF 5 kV HBM ESD classification V LOGIC 16-BIT DAC LATCH 0.375 mW power consumption at 3 V AGNDS CS CONTROL 2.7 V to 5.5 V single-supply operation LDAC LOGIC CLR LDAC SCLK Hardware and functions SERIAL INPUT REGISTER DIN 50 MHz SPI-/QSPI-/MICROWIRE-/DSP-compatible interface AD5512A/ Power-on reset clears DAC output to midscale AD5542A Available in 3 mm 3 mm, 10-/16-lead LFCSP and CLR DGND 16-lead TSSOP Figure 1. 16-Lead TSSOP and 16-Lead LFCSP APPLICATIONS GND 10 Automatic test equipment 8 R AD5542A-1 FB R Precision source-measure instruments FB 7 INV R Data acquisition systems INV 1 REF 16-BIT DAC 6 V OUT Medical and aerospace instrumentation Communication equipment 2 CS 16-BIT DAC LATCH CLR 5 CONTROL LOGIC SCLK 3 GENERAL DESCRIPTION 4 DIN SERIAL INPUT REGISTER 9 The AD5512A/AD5542A are single, 12-/16-bit, serial input, V DD unbuffered voltage output digital-to-analog converters (DAC) Figure 2. 10-Lead LFCSP that operate from a single 2.7 V to 5.5 V supply. The DAC output range extends from 0 V to V and is guaranteed REF Table 1. Related Devices monotonic, providing 1 LSB INL accuracy at 16 bits without Part No. Description adjustment over the full specified temperature range of 40C AD5040/AD5060 2.7 V to 5.5 V 14-/16-bit buffed output DACs to +85C (AD5542A) or 40C to +125C (AD5512A). 2.7 V to 5.5 V 16-bit voltage output DACs AD5541/AD5542 Offering unbuffered outputs, the AD5512A/AD5542A achieve 18-/20-bit voltage output DACs AD5781/AD5791 a 1 s settling time with low offset errors ideal for high speed 16-bit 12 V/15 V bipolar output DAC AD5570 open loop control. 4.5 V to 5.5 V, 12-/16-bit quad channel DAC AD5024/AD5064 AD5764 16-bit, bipolar, voltage output DAC The AD5512A/AD5542A incorporate a bipolar mode of operation that generates a V output swing. The REF AD5512A/AD5542A also include Kelvin sense connections for PRODUCT HIGHLIGHTS the reference and analog ground pins to reduce layout sensitivity. 1. 16-bit performance without adjustment. 2. 2.7 V to 5.5 V single supply operation. The AD5512A/AD5542A are available in a 16-lead LFCSP with 3. Low 11.8 nV/Hz noise spectral density. the AD5542A also available in a 10-lead LFCSP and a 16-lead 4. Low 0.05 ppm/C temperature drift. TSSOP. The AD5512A/AD5542A use a versatile 3-wire interface 5. 3 mm 3 mm LFCSP and TSSOP packaging. that is compatible with 50 MHz SPI, QSPI, MICROWIRE, and DSP interface standards. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20102017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 09199-002 09199-001AD5512A/AD5542A Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Unipolar Output Operation ...................................................... 15 Applications ....................................................................................... 1 Bipolar Output Operation ......................................................... 16 General Description ......................................................................... 1 Output Amplifier Selection ....................................................... 17 Functional Block Diagram .............................................................. 1 Force Sense Amplifier Selection ............................................... 17 Product Highlights ........................................................................... 1 Reference and Ground ............................................................... 17 Revision History ............................................................................... 2 Power-On Reset .......................................................................... 17 Specifications ..................................................................................... 3 Power Supply and Reference Bypassing .................................. 17 AD5512A ....................................................................................... 3 Applications Information .............................................................. 18 AD5542A ....................................................................................... 4 Microprocessor Interfacing ....................................................... 18 AC Characteristics ........................................................................ 5 AD5512A/AD5542A to ADSP-BF531 Interface .................... 18 Timing Characteristics ................................................................ 6 AD5512A/AD5542A to SPORT Interface .............................. 18 Absolute Maximum Ratings ............................................................ 7 AD5512A/AD5542A to 68HC11/68L11 Interface ................... 18 ESD Caution .................................................................................. 7 AD5512A/AD5542A to MICROWIRE Interface .................. 18 Pin Configuration and Function Descriptions ............................. 8 Layout Guidelines....................................................................... 19 Typical Performance Characteristics ........................................... 10 Galvanically Isolated Interface ................................................. 19 Terminology .................................................................................... 14 Decoding Multiple DACs .......................................................... 19 Theory of Operation ...................................................................... 15 Outline Dimensions ....................................................................... 20 Digital-to-Analog Section ......................................................... 15 Ordering Guide .......................................................................... 21 Serial Interface ............................................................................ 15 REVISION HISTORY 2/2017Rev. B to Rev. C Changes to Figure 4 and Table 7 ..................................................... 8 4/2015Rev. A to Rev. B Changes to Power-On Reset Section ............................................ 17 Deleted AD5512A/AD5542A to ADSP-2101 Interface Section .. 18 Updated Outline Dimensions ....................................................... 20 Changes to Ordering Guide .......................................................... 21 5/2011Rev. 0 to Rev. A Changes to Table 3, Power Dissipation Value and Endnote 1 .... 4 Changes to Table 5 ............................................................................ 6 Changes to Ordering Guide .......................................................... 21 10/2010Revision 0: Initial Version Rev. C Page 2 of 21