X-On Electronics has gained recognition as a prominent supplier of AD5560JSVUZ Power Management Specialised - PMIC across the USA, India, Europe, Australia, and various other global locations. AD5560JSVUZ Power Management Specialised - PMIC are a product manufactured by Analog Devices. We provide cost-effective solutions for Power Management Specialised - PMIC, ensuring timely deliveries around the world.

AD5560JSVUZ Analog Devices

AD5560JSVUZ electronic component of Analog Devices
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Part No.AD5560JSVUZ
Manufacturer: Analog Devices
Category: Power Management Specialised - PMIC
Description: Analog Devices Power Management Specialized IC 12A programmable DPS ws
Datasheet: AD5560JSVUZ Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
1: USD 36.0968 ea
Line Total: USD 36.1 
Availability - 0
MOQ: 1  Multiples: 1
Pack Size: 1
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Ship by Fri. 22 Nov to Thu. 28 Nov
MOQ : 1
Multiples : 1
1 : USD 42.6892
10 : USD 41.806
25 : USD 40.9228
50 : USD 40.0395
100 : USD 39.1563
500 : USD 38.2731

0
Ship by Wed. 20 Nov to Fri. 22 Nov
MOQ : 1
Multiples : 1
1 : USD 61.3343
10 : USD 55.9452
25 : USD 53.5951
100 : USD 49.9147

   
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1.2 A Programmable Device Power Supply with Integrated 16-Bit Level Setting DACs Data Sheet AD5560 FEATURES On-chip comparators Gangable for higher current Programmable device power supply (DPS) Guard amplifier FV, MI, MV, FNMV functions System PMU connections 5 internal current ranges (on-chip R ) SENSE Current clamps 5 A, 25 A, 250 A, 2.5 mA, 25 mA Die temperature sensor and shutdown feature 2 external high current ranges (external R ) SENSE On-chip diode thermal array EXTFORCE1: 1.2 A maximum Diagnostic register allows access to internal nodes EXTFORCE2: 500 mA maximum Open-drain alarm flags (temperature, current clamp, Kelvin Integrated programmable levels alarm) All 16-bit DACs: force DAC, comparator DACs, clamp DACs, SPI-/MICROWIRE-/DSP-compatible interface offset DAC, OSD DAC, DGS DAC 64-lead (10 mm 10 mm) TQFP with exposed pad (on top) Programmable Kelvin clamp and alarm 72-ball (8 mm 8 mm) flip-chip BGA Offset and gain correction registers on-chip Ramp mode on force DAC for power supply slewing APPLICATIONS Programmable slew rate feature, 1 V/s to 0.3 V/s Automatic test equipment (ATE) DUTGND Kelvin sense and alarm Device power supply 25 V FV span with asymmetrical operation within 22 V/+25 V GENERAL DESCRIPTION The AD5560 is a high performance, highly integrated device dissipation. Current ranges in excess of 1.2 A or at high power supply consisting of programmable force voltages and current and high voltage combinations can be achieved by measure ranges. This part includes the required DAC levels to paralleling or ganging multiple DPS devices. Open-drain alarm outputs are provided in the event of overcurrent, set the programmable inputs for the drive amplifier, as well as clamping and comparator circuitry. Offset and gain correction overtemperature, or Kelvin alarm on either the SENSE or is included on-chip for DAC functions. A number of program- DUTGND line. mable measure current ranges are available: five internal fixed The DPS functions are controlled via a simple 3-wire serial ranges and two external customer-selectable ranges (EXTFORCE1 interface compatible with SPI, QSPI, MICROWIRE, and DSP and EXTFORCE2) that can supply currents up to 1.2 A and interface standards running at clock speeds of up to 50 MHz. 500 mA, respectively. The voltage range possible at this high current level is limited by headroom and the maximum power Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20082016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com AD5560 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Adjusting the Autocompensation Mode ................................. 39 Applications ....................................................................................... 1 Dealing with Parallel Load Capacitors .................................... 39 General Description ......................................................................... 1 DAC Levels .................................................................................. 39 Revision History ............................................................................... 3 Force and Comparator DACs ................................................... 39 Functional Block Diagram .............................................................. 4 Clamp DACs ............................................................................... 39 Specifications ..................................................................................... 5 OSD DAC .................................................................................... 40 Timing Characteristics .............................................................. 13 DUTGND DAC .......................................................................... 40 Timing Diagrams ........................................................................ 13 Offset DAC .................................................................................. 40 Absolute Maximum Ratings .......................................................... 15 Offset and Gain Registers .......................................................... 40 ESD Caution ................................................................................ 15 Reference Selection .................................................................... 41 Pin Configurations and Function Descriptions ......................... 16 Calibration................................................................................... 41 Typical Performance Characteristics ........................................... 20 Additional Calibration ............................................................... 41 Terminology .................................................................................... 28 System Level Calibration ........................................................... 41 Theory of Operation ...................................................................... 29 Choosing AV /AV Power Supply Rails ............................... 42 DD SS Force Amplifier ........................................................................... 29 Choosing HCAV x and HCAV x Supply Rails ................... 42 SS DD DAC Reference Voltage (VREF) ............................................... 29 Power Dissipation....................................................................... 42 Open-Sense Detect (OSD) Alarm and Clamp ....................... 29 Package Composition and Maximum Vertical Force ............ 43 Device Under Test Ground (DUTGND)................................. 29 Slew Rate Control ....................................................................... 43 GPO .............................................................................................. 29 Serial Interface ................................................................................ 45 Comparators ................................................................................ 30 SPI Interface ................................................................................ 45 Current Clamps .......................................................................... 30 SPI Write Mode .......................................................................... 45 Short-Circuit Protection ............................................................ 30 SDO Output ................................................................................ 45 Guard Amplifier ......................................................................... 30 RESET Function ......................................................................... 45 Compensation Capacitors ......................................................... 30 BUSY Function ........................................................................... 45 Current Range Selection ............................................................ 31 LOAD Function .......................................................................... 45 High Current Ranges ................................................................. 31 Register Update Rates ................................................................ 46 Ideal Sequence for Gang Mode ................................................. 32 Control Registers ............................................................................ 47 Compensation for Gang Mode ................................................. 32 DPS and DAC Addressing ........................................................ 47 System Force/Sense Switches .................................................... 32 Readback Mode .......................................................................... 58 Die Temperature Sensor and Thermal Shutdown.................. 33 DAC Readback............................................................................ 58 Measure Output (MEASOUT) ................................................. 33 Power-On Default ...................................................................... 58 V Voltage ................................................................................ 33 MID Using the HCAV x and HCAV x Supplies .......................... 60 DD SS Force Amplifier Stability............................................................ 36 Power Supply Sequencing ......................................................... 60 Poles and Zeros in a Typical System ........................................ 37 Required External Components ............................................... 61 Minimizing the Number of External Compensation Power Supply Decoupling ......................................................... 62 Components ................................................................................ 37 Applications Information .............................................................. 63 Extra Poles and Zeros in the AD5560 ...................................... 37 Thermal Considerations ............................................................ 63 Compensation Strategies ........................................................... 38 Temperature Contour Map on the Top of the Package ......... 64 Optimizing Performance for a Known Capacitor Using Outline Dimensions ....................................................................... 65 Autocompensation Mode .......................................................... 38 Ordering Guide .......................................................................... 66 Rev. E Page 2 of 66

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