2.7 V to 5.5 V, <100 A, 8-/10-/12-Bit nanoDAC, SPI Interface in LFCSP and SC70 Data Sheet AD5601/AD5611/AD5621 FEATURES FUNCTIONAL BLOCK DIAGRAM V DD 6-lead SC70 and LFCSP packages GND Micropower operation: 100 A maximum at 5 V POWER-ON Power-down typically to 0.2 A at 3 V AD5601/AD5611/AD5621 RESET 2.7 V to 5.5 V power supply Guaranteed monotonic by design REF(+) DAC OUTPUT 12-/10-/8-BIT V Power-on reset to 0 V with brownout detection OUT REGISTER BUFFER DAC 3 power-down functions Low power serial interface with Schmitt-triggered inputs On-chip output buffer amplifier, rail-to-rail operation INPUT POWER-DOWN CONTROL RESISTOR SYNC interrupt facility CONTROL LOGIC LOGIC NETWORK Minimized zero-code error AD5601 buffered 8-bit DAC B version: 0.5 LSB INL AD5611 buffered 10-bit DAC SYNC SCLK SDIN B version: 0.5 LSB INL Figure 1. A version: 4 LSB INL Table 1. Related Devices AD5621 buffered 12-bit DAC Part Number Description B version: 1 LSB INL AD5641 2.7 V to 5.5 V, <100 A, 14-bit nanoDAC in A version: 6 LSB INL SC70 and LFCSP packages APPLICATIONS They also provide software-selectable output loads while in Voltage level setting power-down mode. The parts are put into power-down mode Portable battery-powered instruments over the serial interface. Digital gain and offset adjustment The low power consumption of these parts in normal operation Programmable voltage and current sources makes them ideally suited to portable battery-operated equip- Programmable attenuators ment. The combination of small package and low power makes GENERAL DESCRIPTION these nanoDAC devices ideal for level-setting requirements, such as generating bias or control voltages in space-constrained The AD5601/AD5611/AD5621, members of the nanoDAC and power-sensitive applications. family, are single, 8-/10-/12-bit, buffered voltage output DACs that operate from a single 2.7 V to 5.5 V supply, consuming PRODUCT HIGHLIGHTS typically 75 A at 5 V. The parts come in tiny LFCSP and SC70 1. Available in 6-lead LFCSP and SC70 packages. packages. Their on-chip precision output amplifier allows rail- 2. Low power, single-supply operation. The AD5601/ to-rail output swing to be achieved. The AD5601/AD5611/ AD5611/AD5621 operate from a single 2.7 V to 5.5 V AD5621 utilize a versatile 3-wire serial interface that operates at supply with a maximum current consumption of 100 A, clock rates up to 30 MHz and is compatible with SPI, QSPI, making them ideal for battery-powered applications. MICROWIRE, and DSP interface standards. 3. The on-chip output buffer amplifier allows the output of The reference for the AD5601/AD5611/AD5621 is derived the DAC to swing rail-to-rail with a typical slew rate of from the power supply inputs and, therefore, gives the widest 0.5 V/s. dynamic output range. The parts incorporate a power-on reset 4. Reference is derived from the power supply. circuit, which ensures that the DAC output powers up to 0 V 5. High speed serial interface with clock speeds up to and remains there until a valid write to the device takes place. 30 MHz. Designed for very low power consumption. The interface powers up only during a write cycle. The AD5601/AD5611/AD5621 contain a power-down feature 6. Power-down capability. When powered down, the DAC that reduces current consumption to typically 0.2 A at 3 V. typically consumes 0.2 A at 3 V. Power-on reset with brownout detection. Rev. I Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20052019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 06853-001AD5601/AD5611/AD5621 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Output Amplifier ........................................................................ 14 Applications ....................................................................................... 1 Serial Interface ............................................................................ 14 General Description ......................................................................... 1 Input Shift Register .................................................................... 14 Functional Block Diagram .............................................................. 1 SYNC Interrupt .......................................................................... 14 Product Highlights ........................................................................... 1 Power-On Reset .......................................................................... 16 Revision History ............................................................................... 2 Power-Down Modes .................................................................. 16 Specif icat ions ..................................................................................... 3 Microprocessor Interfacing ....................................................... 16 Timing Characteristics ................................................................ 4 Applications Information .............................................................. 18 Absolute Maximum Ratings ............................................................ 5 Choosing a Reference as Power Supply for the AD5601/AD5611/AD5621 ....................................................... 18 ESD Caution .................................................................................. 5 Bipolar Operation Using the AD5601/AD5611/AD5621 ..... 18 Pin Configurations and Function Descriptions ........................... 6 Using the AD5601/AD5611/AD5621 with a Galvanically Typical Performance Characteristics ............................................. 7 Isolated Interface ........................................................................ 19 Terminology .................................................................................... 13 Power Supply Bypassing and Grounding ................................ 19 Theory of Operation ...................................................................... 14 Outline Dimensions ....................................................................... 20 DAC Section ................................................................................ 14 Ordering Guide .......................................................................... 21 Resistor String ............................................................................. 14 REVISION HISTORY 4/2019Rev. H to Rev. I 5/2008Rev. C to Rev. D Changes to Table 2 ............................................................................ 5 Changes to General Description Section ....................................... 1 Change to Figure 16 ......................................................................... 8 Changes to Table 2 ............................................................................. 3 Updated Outline Dimensions ....................................................... 20 Changes to Choosing a Reference as Power Supply for the Changes to Ordering Guide .......................................................... 21 AD5601/AD5611/AD5621 Section .............................................. 18 Changes to Ordering Guide .......................................................... 20 2/2016Rev. G to Rev. H Changes to Noise Parameter, Table 2 ............................................. 3 12/2007Rev. B to Rev. C Changes to Serial Interface Section .............................................. 14 Changes to Features .......................................................................... 1 Changes to Table 2 ............................................................................. 3 6/2013Rev. F to Rev. G Changes to AD5601/AD5611/AD5621 to ADSP-2101 Change to Ordering Guide ............................................................ 21 Interface Section ............................................................................. 16 Updated Outline Dimensions ....................................................... 20 Changes to Ordering Guide .......................................................... 20 2/2012Rev. E to Rev. F Added 6-Lead LFCSP ......................................................... Universal Changes to Features Section, General Description Section, 7/2005Rev. A to Rev. B Table 1, and Product Highlights Section ....................................... 1 Changes to Figure 48 ...................................................................... 17 Changes to Table 4 ............................................................................ 5 Changes to Galvanically Isolated Interface Section ................... 19 Added Figure 4 Renumbered Sequentially .................................. 6 Changes to Figure 52 ...................................................................... 19 Changes to Table 5 ............................................................................ 6 Changes to Choosing a Reference as Power Supply for the 3/2005Rev. 0 to Rev. A Changes to Timing Characteristics ................................................. 4 AD5601/AD5611/AD5621 Section .............................................. 18 Updated Outline Dimensions ....................................................... 20 Changes to Absolute Maximum Ratings ........................................ 5 Changes to Ordering Guide .......................................................... 21 Changes to Full Scale Error Section ................................................ 7 Changes to Figure 20 ...................................................................... 10 7/2010Rev. D to Rev. E Changes to Theory of Operation .................................................. 14 Changes to Figure 1 .......................................................................... 1 Changes to Power Down Modes .................................................. 15 1/2005Revision 0: Initial Version Rev. I Page 2 of 21