2 Octal, 12-/16-Bit, I C, denseDACs with 5 ppm/C On-Chip Reference Data Sheet AD5629R/AD5669R FEATURES FUNCTIONAL BLOCK DIAGRAM V V /V DD REFIN REFOUT Low power octal DACs AD5629R: 12 bits AD5629R/AD5669R 1.25V/2.5V REF BUFFER AD5669R: 16 bits LDAC INPUT DAC STRING V A OUT 2.6 mm 2.6 mm 16-ball WLCSP REGISTER REGISTER DAC A BUFFER 4 mm 4 mm 16-lead LFCSP and 16-lead TSSOP SCL INPUT DAC STRING V B OUT On-chip 1.25 V/2.5 V, 5 ppm/C reference REGISTER REGISTER DAC B BUFFER Power down to 400 nA at 5 V, 200 nA at 3 V INPUT DAC STRING V C 2.7 V to 5.5 V power supply OUT REGISTER REGISTER DAC C Guaranteed monotonic by design BUFFER SDA INPUT DAC STRING V D Power-on reset to zero scale or midscale OUT REGISTER REGISTER DAC D 3 power-down functions BUFFER INPUT DAC STRING CLR Hardware LDAC and functions V E OUT REGISTER REGISTER DAC E 2 I C-compatible serial interface supports standard (100 kHz) BUFFER A0 INPUT DAC STRING and fast (400 kHz) modes V F OUT REGISTER REGISTER DAC F BUFFER APPLICATIONS INPUT DAC STRING V G OUT REGISTER REGISTER DAC G Process control BUFFER Data acquisition systems INPUT DAC STRING V H OUT REGISTER REGISTER DAC H Portable battery-powered instruments POWER-ON RESET POWER-DOWN LOGIC Digital gain and offset adjustment Programmable voltage and current sources LDAC CLR GND Figure 1. GENERAL DESCRIPTION The AD5629R/AD5669R devices are low power, octal, 12-/16- The parts incorporate a power-on reset circuit to ensure that bit, buffered voltage-output DACs. All devices are guaranteed the DAC output powers up to 0 V (AD5629R-1/AD5629R-2, monotonic by design. AD5669R-1/AD5669R-2) or midscale (AD5629R-3/AD5669R-3) and remains powered up at this level until a valid write takes place. The AD5629R/AD5669R have an on-chip reference with an The part contains a power-down feature that reduces the current internal gain of 2. The AD5629R-1/AD5669R-1 have a 1.25 V, consumption of the device to 400 nA at 5 V and provides software- 5 ppm/C reference, giving a full-scale output range of 2.5 V. selectable output loads while in power-down mode for any or The AD5629R-2/AD5629R-3 and the AD5669R-2/AD5669R-3 all DAC channels. have a 2.5 V 5 ppm/C reference, giving a full-scale output range of 5 V depending on the option selected. Devices with 1.25 V PRODUCT HIGHLIGHTS reference selected operate from a single 2.7 V to 5.5 V supply. 1. Octal, 12-/16-bit DACs. Devices with 2.5 V reference selected operate from 4.5 V to 5.5 V. 2. On-chip 1.25 V/2.5 V, 5 ppm/C reference. The on-chip reference is off at power-up, allowing the use of an 3. Available in 16-lead LFCSP and TSSOP, and 16-ball WLCSP. external reference. The internal reference is enabled via a 4. Power-on reset to 0 V or midscale. software write. 5. Power-down capability. When powered down, the DAC typically consumes 200 nA at 3 V and 400 nA at 5 V. Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20102018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com INTERFACE LOGIC 08819-001AD5629R/AD5669R Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Resistor String ............................................................................. 21 Applications ....................................................................................... 1 Internal Reference ...................................................................... 21 Functional Block Diagram .............................................................. 1 Output Amplifier ........................................................................ 22 General Description ......................................................................... 1 Serial Interface ............................................................................ 22 Product Highlights ........................................................................... 1 Write Operation.......................................................................... 22 Revision History ............................................................................... 2 Read Operation........................................................................... 22 Specif icat ions ..................................................................................... 3 Input Shift Register .................................................................... 24 AC Characteristics ........................................................................ 6 Multiple Byte Operation ............................................................ 24 2 I C Timing Characteristics .......................................................... 7 Internal Reference Register ....................................................... 25 Absolute Maximum Ratings ............................................................ 9 Power-On Reset .......................................................................... 25 ESD Caution .................................................................................. 9 Power-Down Modes .................................................................. 26 Pin Configurations and Function Descriptions ......................... 10 Clear Code Register ................................................................... 26 Typical Performance Characteristics ........................................... 12 LDAC Function .......................................................................... 28 Terminology .................................................................................... 19 Power Supply Bypassing and Grounding ................................ 28 Theory of Operation ...................................................................... 21 Outline Dimensions ....................................................................... 29 Digital-to-Analog Converter (DAC) Section ......................... 21 Ordering Guide .......................................................................... 30 REVISION HISTORY 6/2018Rev. E to Rev. F 12/2010Rev. 0 to Rev. A Changes to Serial Interface Section .............................................. 22 Changes to Features, General Description, and Product Updated Outline Dimensions ....................................................... 29 Highlights Sections............................................................................ 1 Changes to Ordering Guide .......................................................... 30 Changes to AD5629R Relative Accuracy Parameter, Reference Output (1.25 V) Reference Input Range Parameter, and Reference Output (2.5 V) Reference Input Range Parameter (Table 1) ....... 3 9/2016Rev. D to Rev. E Change to Read Operation Section .............................................. 22 Changes to Relative Accuracy Parameter, Reference Tempco Parameter (Table 2) ........................................................................... 5 4/2014Rev. C to Rev. D Changes to Output Voltage Settling Time Parameter (Table 3) .. 6 Change to V B, V C, V D, V E, V G, V H Ball Changes to Table 5 ............................................................................. 9 OUT OUT OUT OUT OUT OUT Numbers Table 6 ............................................................................ 11 CLR Changes to Pin Description (Table 6) ................................. 10 Added Figure 32 and Figure 33 .................................................... 15 2/2014Rev. B to Rev. C Added Figure 46 ............................................................................. 17 Change to Table 6 ........................................................................... 11 Changes to Internal Reference Section ........................................ 20 Changes to Figure 38, Figure 39, and Figure 40 ......................... 17 Changes to Power-On Reset Section ........................................... 23 Changes to Ordering Guide .......................................................... 30 Changes to Clear Code Register Section ..................................... 24 Updated Outline Dimensions ....................................................... 27 2/2013Rev. A to Rev. B Changes to Ordering Guide .......................................................... 28 Added 16-Ball WLCSP ....................................................... Universal Changes to Features Section............................................................ 1 10/2010Revision 0: Initial Version Added Figure 5, Renumbered Sequentially ................................ 10 Moved Table 6 ................................................................................. 11 Changes to Figure 25 and Figure 26 ............................................. 15 Added Figure 58 .............................................................................. 29 Changes to Ordering Guide .......................................................... 30 Rev. F Page 2 of 30