High Speed 12-Bit a Monolithic D/A Converters AD565A FUNCTIONAL BLOCK DIAGRAMS FEATURES Single Chip Construction V REF OUT CC BIPOLAR OFF Very High Speed Settling to 1/2 LSB 20V SPAN AD565A: 250 ns max 10V AD565A 5k AD566A: 350 ns max 9.95k 10V SPAN Full-Scale Switching Time: 30 ns 19.95k 0.5mA REF IN 5k Guaranteed for Operation with 12 V (565A) Supplies, I REF DAC OUT DAC with 12 V Supply (AD566A) I = 20k OUT I REF 8k O Linearity Guaranteed Overtemperature 4 I CODE GND REF 1/2 LSB max (K, T Grades) CODE INPUT Monotonicity Guaranteed Overtemperature Low Power: AD566A = 180 mW max V POWER MSB LSB EE AD565A = 225 mW max GND BIPOLAR OFF Use with On-Board High Stability Reference (AD565A) 20V SPAN or with External Reference (AD566A) AD566A 5k Low Cost 9.95k 19.95k 10V SPAN MlL-STD-883-Compliant Versions Available 0.5mA REF 5k IN AD566A is obsolete I REF DAC OUT DAC PRODUCT DESCRIPTION I = 20k OUT REF I 8k O The AD565A and AD566A are fast 12-bit digital-to-analog 4 I CODE GND REF converters that incorporate the latest advances in analog circuit CODE INPUT design to achieve high speeds at low cost. The AD565A and AD566A use 12 precision, high speed bipolar V POWER MSB LSB EE GND current-steering switches, a control amplifier, and a laser-trimmed thin-film resistor network to produce a very fast, high accuracy AD565A and AD566A are available in four performance analog output current. The AD565A also includes a buried grades. The J and K grades are specified for use over the 0C to Zener reference that features low noise, long-term stability, and +70C temperature range while the S and T grades are speci- temperature drift characteristics comparable to the best discrete fied for the 55C to +125C range. The D grades are all pack- reference diodes. aged in a 24-lead, hermetically sealed, ceramic, dual-in-line package. The JR grade is packaged in a 28-lead plastic SOIC. The combination of performance and flexibility in the AD565A and AD566A has resulted from major innovations in circuit design, PRODUCT HIGHLIGHTS an important new high speed bipolar process, and continuing 1. The wide output compliance range of the AD565A and advances in laser-wafer-trimming techniques (LWT). The AD566A are ideally suited for fast, low noise, accurate voltage AD565A and AD566A have a 10%90% full-scale transition output configurations without an output amplifier. time less than 35 ns and settle to within 1/2 LSB in 250 ns max 2. The devices incorporate a newly developed, fully differential, (350 ns for AD566A). Both are laser-trimmed at the wafer level nonsaturating precision current switching cell structure that to 1/8 LSB typical linearity and are specified to 1/4 LSB max combines the dc accuracy and stability first developed in the error (K and T grades) at +25C. High speed and accuracy make AD562/AD563 with very fast switching times and an optimally the AD565A and AD566A the ideal choice for high speed display damped settling characteristic. drivers as well as for fast analog-to-digital converters. 3. The devices also contain SiCr thin-film application resistors The laser trimming process that provides the excellent linearity that can be used with an external op amp to provide a preci- is also used to trim both the absolute value and the temperature sion voltage output or as input resistors for a successive- coefficient of the reference of the AD565A, resulting in a typical approximation A/D converter. The resistors are matched to full-scale gain TC of 10 ppm/C. When tighter TC performance the internal ladder network to guarantee a low gain temperature is required or when a system reference is available, the AD566A coefficient and are laser-trimmed for minimum full-scale and may be used with an external reference. bipolar offset errors. 4. The AD565A and AD566A are available in versions compliant The AD566A is no longer available. with MIL-STD-883. Refer to the Analog Devices Military Products Databook or current /883B data sheet for detailed F specifications. REV. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties that Tel: 781/329-4700 www.analog.com may result from its use. No license is granted by implication or otherwise 781/461-3113 2015 under any patent or patent rights of Analog Devices. Fax: Analog Devices, Inc., AD565ASPECIFICATIONS (T = 25 C, V = 15 V, V = 15 V, unless otherwise noted.) A CC EE AD565AJ AD565AK Parameter Min Typ Max Min Typ Max Unit 1 DATA INPUTS (Pins 13 to 24) TTL or 5 V CMOS Input Voltage Bit ON Logic 1 2.0 5.5 2.0 5.5 V Bit OFF Logic 0 0.8 0.8 V Logic Current (Each Bit) Bit ON Logic 1 120 300 120 300 A Bit OFF Logic 0 35 100 35 100 A RESOLUTION 12 12 Bits OUTPUT Current Unipolar (All Bits On) 1.6 2.0 2.4 1.6 2.0 2.4 mA Bipolar (All Bits On or Off) 0.8 1.0 1.2 0.8 1.0 1.2 mA Resistance (Exclusive of Span Resistors) 6 8 10 6 8 10 k Offset Unipolar 0.01 0.05 0.01 0.05 % of F.S. Range Bipolar (Figure 3, R2 = 50 Fixed) 0.05 0.15 0.05 0.1 % of F.S. Range Capacitance 25 25 pF Compliance Voltage T to T 1.5 +10 1.5 +10 V MIN MAX ACCURACY (Error Relative to Full Scale) 25C 1/4 1/2 1/8 0.35 LSB (0.006) (0.012) (0.003) (0.0084) % of F.S. Range T to T 1/2 3/4 1/4 1/2 LSB MIN MAX (0.012) (0.018) (0.006) (0.012) % of F.S. Range DIFFERENTIAL NONLINEARITY 25C 1/2 3/4 1/4 1/2 LSB T to T MONOTONICITY GUARANTEED MONOTONICITY GUARANTEED MIN MAX TEMPERATURE COEFFICIENTS With Internal Reference Unipolar Zero 1 2 1 2 ppm/C Bipolar Zero 5 10 5 10 ppm/C Gain (Full Scale) 15 50 10 20 ppm/C Differential Nonlinearity 2 2 ppm/C SETTLING TIME TO 1/2 LSB All Bits ON-to-OFF or OFF-to-ON 250 400 250 400 ns FULL-SCALE TRANSITION 10% to 90% Delay plus Rise Time 15 30 15 30 ns 90% to 10% Delay plus Fall Time 30 50 30 50 ns TEMPERATURE RANGE Operating 0 +70 0 +70 C Storage 65 +150 65 +150 C POWER REQUIREMENTS V , +11.4 to +16.5 V dc 3 5 3 5 mA CC V , 11.4 to 16.5 V dc 12 18 12 18 mA EE 2 POWER SUPPLY GAIN SENSITIVITY V = +11.4 to +16.5 V dc 3 10 3 10 ppm of F.S./% CC V = 11.4 to 16.5 V dc 15 25 15 25 ppm of F.S./% EE PROGRAMMABLE OUTPUT RANGES (See Figures 2, 3, 4) 0 to +5 0 to +5 V 2.5 to +2.5 2.5 to +2.5 V 0 to +10 0 to +10 V 5 to +5 5 to +5 V 10 to +10 10 to +10 V EXTERNAL ADJUSTMENTS Gain Error with Fixed 50 Resistor for R2 (Figure 2) 0.1 0.25 0.1 0.25 % of F.S. Range Bipolar Zero Error with Fixed 50 Resistor for R1 (Figure 3) 0.05 0.15 0.05 0.1 % of F.S. Range Gain Adjustment Range (Figure 2) 0.25 0.25 % of F.S. Range Bipolar Zero Adjustment Range 0.15 0.15 % of F.S. Range REFERENCE INPUT Input Impedance 15 20 25 15 20 25 k REFERENCE OUTPUT Voltage 9.90 10.00 10.10 9.90 10.00 10.10 V 3 Current (Available for External Loads) 1.5 2.5 1.5 2.5 mA POWER DISSIPATION 225 345 225 345 mW NOTES 1 The digital inputs are guaranteed but not tested over the operating temperature range. 2 The power supply gain sensitivity is tested in reference to a V , V of 15 V dc. CC EE 3 For operation at elevated temperatures, the reference cannot supply current for external loads. It, therefore, should be buffered if additional loads are to be supplied. Specifications subject to change without notice. F 2 REV.