Dual, 12-/14-/16-Bit nanoDACs with 2 5 ppm/C On-Chip Reference, I C Interface Data Sheet AD5627R/AD5647R/AD5667R, AD5627/AD5667 FEATURES FUNCTIONAL BLOCK DIAGRAMS V V /V DD GND REFIN REFOUT Low power, smallest pin-compatible, dual nanoDACs AD5627R/AD5647R/AD5667R AD5627R/AD5647R/AD5667R 1.25V/2.5V REF BUFFER 12-/14-/16-bit ADDR INPUT DAC STRING V A OUT On-chip 1.25 V/2.5 V, 5 ppm/C reference REGISTER REGISTER DAC A AD5627/AD5667 SCL BUFFER INPUT DAC STRING 12-/16-bit V B OUT REGISTER REGISTER DAC B SDA External reference only POWER-ON POWER-DOWN 3 mm x 3 mm LFCSP and 10-lead MSOP RESET LOGIC 2.7 V to 5.5 V power supply LDAC CLR Guaranteed monotonic by design Figure 1. AD5627R/AD5647R/AD5667R Power-on reset to zero scale V V Per channel power-down DD GND REFIN LDAC CLR Hardware and functions AD5627/AD5667 2 I C-compatible serial interface supports standard (100 kHz), BUFFER ADDR fast (400 kHz), and high speed (3.4 MHz) modes INPUT DAC STRING V A OUT REGISTER REGISTER DAC A SCL APPLICATIONS BUFFER INPUT DAC STRING V B OUT REGISTER REGISTER DAC B Process control SDA Data acquisition systems POWER-ON POWER-DOWN RESET LOGIC Portable battery-powered instruments Digital gain and offset adjustment LDAC CLR Programmable voltage and current sources Figure 2. AD5627/AD5667 Programmable attenuators GENERAL DESCRIPTION The AD5627R/AD5647R/AD5667R, AD5627/AD5667 members The device contains a per-channel power-down feature that of the nanoDAC family are low power, dual, 12-, 14-, 16-bit reduces the current consumption of the device to 480 nA at 5 V buffered voltage-out digital-to-analog converters (DACs) and provides software-selectable output loads while in power- with/without on-chip reference. All devices operate from a single down mode. The low power consumption of this device in 2.7 V to 5.5 V supply, are guaranteed monotonic by design, and normal operation makes it ideally suited to portable battery- 2 have an I C-compatible serial interface. operated equipment. The on-chip precision output amplifier enables rail-to-rail output swing. The AD5627R/AD5647R/AD5667R have an on-chip reference. The AD5627RBCPZ, AD5647RBCPZ, and AD5667RBCPZ have a The AD5627R/AD5647R/AD5667R, AD5627/AD5667 use a 2 1.25 V, 5 ppm/C reference, giving a full-scale output range of 2.5 V 2-wire I C-compatible serial interface that operates in standard the AD5627RBRMZ and AD5667RBRMZ have a 2.5 V, 5 ppm/C (100 kHz), fast (400 kHz), and high speed (3.4 MHz) modes. reference, giving a full-scale output range of 5 V. The on-chip Table 1. Related Devices reference is off at power-up, allowing the use of an external Part No. Description reference. The internal reference is enabled via a software write. AD5663 2.7 V to 5.5 V, dual 16-bit DAC, The AD5667 and AD5627 require an external reference voltage 2 external reference, I C interface to set the output range of the DAC. AD5623R/AD5643R/AD5663R 2.7 V to 5.5 V, dual 12-, 14-, 16- The AD5627R/AD5647R/AD5667R, AD5627/AD5667 bit DACs, internal reference, 2 I C interface incorporate a power-on reset circuit that ensures the DAC AD5625R/AD5645R/AD5665R, 2.7 V to 5.5 V, quad 12-, 14-, 16- output powers up to 0 V, and remains there until a valid write AD5625/AD5665 bit DACs, with/without internal takes place. 2 reference, I C interface Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20072016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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Technical Support www.analog.com INTERFACE INTERFACE LOGIC LOGIC 06342-002 06342-001AD5627R/AD5647R/AD5667R, AD5627/AD5667 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Write Operation.......................................................................... 21 Applications ....................................................................................... 1 Read Operation........................................................................... 21 Functional Block Diagrams ............................................................. 1 High Speed Mode ....................................................................... 21 General Description ......................................................................... 1 Input Shift Register .................................................................... 23 Revision History ............................................................................... 2 Multiple Byte Operation ............................................................ 23 Specifications ..................................................................................... 3 Broadcast Mode .......................................................................... 23 AC Characteristics ........................................................................ 5 LDAC Function .......................................................................... 23 2 I C Timing Specifications ............................................................ 6 Power-Down Modes .................................................................. 25 Absolute Maximum Ratings ............................................................ 8 Power-On Reset and Software Reset........................................ 26 ESD Caution .................................................................................. 8 Clear Pin (CLR) .......................................................................... 26 Pin Configuration and Function Descriptions ............................. 9 Internal Reference Setup (R Versions) .................................... 26 Typical Performance Characteristics ........................................... 10 Application Information ................................................................ 28 Terminology .................................................................................... 18 Using a Reference as a Power Supply for the AD5627R/AD5647R/AD5667R, AD5627/AD5667 .................. 28 Theory of Operation ...................................................................... 20 Bipolar Operation Using the AD5627R/AD5647R/AD5667R, D/A Section ................................................................................. 20 AD5627/AD5667 ......................................................................... 28 Resistor String ............................................................................. 20 Power Supply Bypassing and Grounding ................................ 28 Output Amplifier ........................................................................ 20 Outline Dimensions ....................................................................... 29 Internal Reference ...................................................................... 20 Ordering Guide .......................................................................... 30 External Reference...................................................................... 20 Serial Interface ............................................................................ 21 REVISION HISTORY 9/2016Rev. A to Rev. B 2 Changed SPI to I C ........................................................ Throughout 2/2016Rev. 0 to Rev. A Changes to Internal Reference Section ............................................. 20 Changes to Power-On Reset and Software Reset Section ........... 26 Updated Outline Dimensions .............................................................. 29 Changes to Ordering Guide .................................................................. 30 1/2007Revision 0: Initial Version Rev. B Page 2 of 30