Octal, 12-/16-Bit nanoDAC+ with 2 2 ppm/C Reference, I C Interface Data Sheet AD5671R/AD5675R FEATURES GENERAL DESCRIPTION The AD5671R/AD5675R are low power, octal, 12-/16-bit High performance buffered voltage output digital-to-analog converters (DACs). High relative accuracy (INL): 3 LSB maximum at 16 bits They include a 2.5 V, 2 ppm/C internal reference (enabled by Total unadjusted error (TUE): 0.14% of FSR maximum default) and a gain select pin giving a full-scale output of 2.5 V Offset error: 1.5 mV maximum (gain = 1) or 5 V (gain = 2). The devices operate from a single Gain error: 0.06% of FSR maximum 2.7 V to 5.5 V supply and are guaranteed monotonic by design. Low drift 2.5 V reference: 2 ppm/C typical The AD5671R/AD5675R are available in a 20-lead TSSOP and in Wide operating ranges a 20-lead LFCSP and incorporate a power-on reset circuit and a 40C to +125C temperature range RSTSEL pin that ensures the DAC outputs power up to zero scale 2.7 V to 5.5 V power supply or midscale and remain there until a valid write. The AD5671R/ Easy implementation AD5675R contain a power-down mode, reducing the current User selectable gain of 1 or 2 (GAIN pin/bit) consumption to 1 A typical while in power-down mode. 1.8 V logic compatibility 2 400 kHz I C-compatible serial interface Table 1. Octal nanoDAC+ Devices 20-lead, RoHS-compliant TSSOP and LFCSP Interface Reference 16-Bit 12-Bit SPI Internal AD5676R AD5672R APPLICATIONS External AD5676 Not applicable Optical transceivers 2 IC Internal AD5675R AD5671R Base station power amplifiers Process control (PLC input/output cards) PRODUCT HIGHLIGHTS Industrial automation 1. High Relative Accuracy (INL) Data acquisition systems AD5671R (12-bit): 1 LSB maximum AD5675R (16-bit): 3 LSB maximum 2. Low Drift, 2.5 V On-Chip Reference FUNCTIONAL BLOCK DIAGRAM V V V LOGIC DD REFOUT AD5671R/AD5675R 2.5V REF BUFFER INPUT DAC STRING V 0 OUT REGISTER REGISTER DAC 0 BUFFER INPUT DAC STRING V 1 OUT REGISTER REGISTER DAC 1 BUFFER INPUT DAC STRING SCL V 2 OUT REGISTER REGISTER DAC 2 BUFFER INPUT DAC STRING SDA V 3 OUT REGISTER REGISTER DAC 3 BUFFER DAC STRING INPUT A1 V 4 OUT REGISTER REGISTER DAC 4 BUFFER DAC A0 INPUT STRING V 5 REGISTER DAC 5 OUT REGISTER BUFFER INPUT DAC STRING V 6 LDAC REGISTER OUT REGISTER DAC 6 BUFFER INPUT DAC STRING V 7 RESET OUT REGISTER REGISTER DAC 7 GAIN POWER-DOWN POWER-ON RESET 1/2 LOGIC RSTSEL GND GAIN Figure 1. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20142018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. INTERFACE LOGIC 12664-001AD5671R/AD5675R Data Sheet TABLE OF CONTENTS 2 Features .............................................................................................. 1 I C Slave Address ........................................................................ 25 Applications ....................................................................................... 1 Serial Operation ......................................................................... 25 General Description ......................................................................... 1 Write Operation.......................................................................... 25 Product Highlights ........................................................................... 1 Read Operation........................................................................... 26 Functional Block Diagram .............................................................. 1 Multiple DAC Readback Sequence .......................................... 26 Revision History ............................................................................... 3 Power-Down Operation ............................................................ 27 Specifications ..................................................................................... 4 LDAC Load DAC (Hardware Pin) ........................................... 27 AD5671R Specifications .............................................................. 4 LDAC Mask Register ................................................................. 28 AD5675R Specifications .............................................................. 6 Hardware Reset (RESET) .......................................................... 29 AC Characteristics ........................................................................ 8 Reset Select Pin (RSTSEL) ........................................................ 29 Timing Characteristics ................................................................ 9 Software Reset ............................................................................. 29 Absolute Maximum Ratings .......................................................... 10 Internal Reference and Amplifier Gain Selection .................. 29 Thermal Resistance .................................................................... 10 Solder Heat Reflow ..................................................................... 29 ESD Caution ................................................................................ 10 Long-Term Temperature Drift ................................................. 29 Pin Configurations and Function Descriptions ......................... 11 Thermal Hysteresis .................................................................... 30 Typical Performance Characteristics ........................................... 12 Applications Information .............................................................. 31 Terminology .................................................................................... 21 Power Supply Recommendations ............................................. 31 Theory of Operation ...................................................................... 23 Microprocessor Interfacing ....................................................... 31 Digital-to-Analog Converter (DAC) ....................................... 23 AD5671R/AD5675R to ADSP-BF531 Interface .................... 31 Transfer Function ....................................................................... 23 Layout Guidelines....................................................................... 31 DAC Architecture ....................................................................... 23 Galvanically Isolated Interface ................................................. 31 Serial Interface ............................................................................ 24 Outline Dimensions ....................................................................... 32 Write and Update Commands .................................................. 25 Ordering Guide .......................................................................... 33 Rev. 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