Quad, 12-Bit, Serial Input, Unipolar/Bipolar, Voltage Output DAC Data Sheet AD5726 the V input is set to 0 V and the V input is set to a positive REFN REFP FEATURES voltage. A similar configuration with V at 0 V and V at a REFP REFN +5 V to 15 V operation negative voltage provides a unipolar negative output range. Unipolar or bipolar operation 1 LSB maximum INL error, 1 LSB maximum DNL error Bipolar outputs are configured by connecting both V and REFP Guaranteed monotonic over temperature V to nonzero voltages. This method of setting output voltage REFN Double-buffered inputs ranges has advantages over the bipolar offsetting methods Asynchronous to zero scale/midscale because it is not dependent on internal and external resistors CLR Operating temperature range: 40C to +125C with different temperature coefficients. iCMOS process technology The AD5726 uses a serial interface that operates at clock rates up to 30 MHz and is compatible with DSP and microcontroller interface APPLICATIONS standards. The asynchronous CLR function clears all DAC Industrial automation registers to a user-selectable zero-scale or midscale output. Closed-loop servo control, process control Automotive test and measurement The AD5726 is available in 16-lead SSOP, 20-lead SSOP, and Programmable logic controllers 16-lead SOIC packages. It can be operated from a wide variety of supply and reference voltages with supplies ranging from GENERAL DESCRIPTION single +5 V to 15 V, and references ranging from +2.5 V to The AD5726 is a quad, 12-bit, serial input, voltage output 10 V. Power dissipation is less than 240 mW with 15 V digital-to-analog converter (DAC) fabricated on Analog supplies and only 30 mW with a +5 V supply. Operation is 1 Devices, Inc., iCMOS process technology that offers specified over the temperature range of 40C to +125C. guaranteed monotonicity and integral nonlinearity (INL) A similar device, also available from Analog Devices is of 1 LSB maximum. the AD5725, which is a quad, 12-bit, parallel input, unipolar/ Output voltage swing is set by two reference inputs, V and REFP bipolar, voltage output DAC. V . The DAC offers a unipolar positive output range when REFN FUNCTIONAL BLOCK DIAGRAM AV AV V SS DD REFP 12 12 12 INPUT DAC DAC A V OUTA I/O REG A REG A SDIN REGISTER SCLK AND 12 12 CONTROL INPUT DAC CS DAC B V LOGIC OUTB REG B REG B 12 12 INPUT DAC DAC C V OUTC REG C REG C 12 12 INPUT DAC DAC D V OUTD REG D REG D AD5726 V GND CLR CLRSEL LDAC REFN Figure 1. 1 For analog systems designers within industrial/instrumentation equipment OEMs who need high performance ICs at higher voltage levels, iCMOS is a technology platform that enables the development of analog ICs capable of 30 V and operating at 15 V supplies while allowing dramatic reductions in power consumption and package size, and increased ac and dc performance. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.470020072013 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 06469-001AD5726 Data Sheet TABLE OF CONTENTS Features .....................................................................................1 Theory of Operation................................................................ 13 Applications...............................................................................1 DAC Architecture ................................................................ 13 General Description ..................................................................1 Output Amplifiers ............................................................... 13 Functional Block Diagram .........................................................1 Reference Inputs .................................................................. 13 Revision History ........................................................................2 Serial Interface ..................................................................... 14 Specifications .............................................................................3 Applications Information ........................................................ 15 AC Performance Characteristics ............................................5 Power-Up Sequence ............................................................. 15 Timing Characteristics...........................................................6 Reference Configuration...................................................... 15 Absolute Maximum Ratings ......................................................7 Power Supply Bypassing and Grounding ............................. 16 Thermal Resistance ................................................................7 Galvanically Isolated Interface ............................................. 16 ESD Caution ..........................................................................7 Microprocessor Interfacing.................................................. 17 Pin Configuration and Function Descriptions...........................8 Outline Dimensions ................................................................ 18 Typical Performance Characteristics .........................................9 Ordering Guide ................................................................... 19 Terminology ............................................................................12 REVISION HISTORY 1/08Rev. 0 to Rev. A 10/13Rev. B to Rev. C Changes to Figure 6, Figure 7 .................................................... 9 Changes to Figure 25, Figure 26, and Figure 27 .......................15 Changes to Figure 12, Figure 13 .............................................. 10 Changes to Figure 28 ...............................................................16 Changes to Figure 19, Figure 20 .............................................. 11 6/08Rev. A to Rev. B Inserted New Figure 22, Renumbered Figures Sequentially .... 11 Added 20-Lead SSOP .................................................. Universal Added Major Code Transition Glitch Impulse Section............ 12 Changes to Features Section ......................................................1 Changes to Figure 23 ............................................................... 13 Changes to General Description Section ...................................1 Change to Input Shift Register Section .................................... 14 Deleted Table 1 ..........................................................................1 Change to Single +5 V Supply Operation Section ................... 16 Changes to Pin Configuration and Function Descriptions 4/07Revision 0: Initial Version Section .......................................................................................8 Deleted Figure 7.........................................................................9 Changes to Typical Performance Characteristics Section ..........9 Added Figure 15 ......................................................................10 Changes to Figure 22 ...............................................................11 Updated Outline Dimensions ..................................................18 Changes to Ordering Guide .....................................................19 Rev. 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