Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA Output DAC with Dynamic Power Control and HART Connectivity Data Sheet AD5737 Each channel has a corresponding CHART pin so that HART FEATURES signals can be coupled onto the current output of the AD5737. 12-bit resolution and monotonicity Dynamic power control for thermal management The AD5737 uses a versatile 3-wire serial interface that operates or external PMOS mode at clock rates of up to 30 MHz and is compatible with standard Current output ranges: 0 mA to 20 mA, 4 mA to 20 mA, SPI, QSPI, MICROWIRE, DSP, and microcontroller interface and 0 mA to 24 mA standards. The serial interface also features optional CRC-8 packet 0.1% total unadjusted error (TUE) maximum error checking, as well as a watchdog timer that monitors activity User-programmable offset and gain on the interface. On-chip diagnostics PRODUCT HIGHLIGHTS On-chip reference: 10 ppm/C maximum 1. Dynamic power control for thermal management. 40C to +105C temperature range 2. 12-bit performance. APPLICATIONS 3. Quad channel. Process control 4. HART compliant. Actuator control COMPANION PRODUCTS PLCs Product Family: AD5755, AD5755-1, AD5757, AD5735 HART network connectivity HART Modem: AD5700, AD5700-1 GENERAL DESCRIPTION External References: ADR445, ADR02 The AD5737 is a quad-channel current output DAC that Digital Isolators: ADuM1410, ADuM1411 operates with a power supply range from 10.8 V to 33 V. Power: ADP2302, ADP2303 On-chip dynamic power control minimizes package power Additional companion products on the AD5737 product page dissipation by regulating the voltage on the output driver from 7.4 V to 29.5 V using a dc-to-dc boost converter optimized for minimum on-chip power dissipation. FUNCTIONAL BLOCK DIAGRAM AV CC 5.0V AV DD AGND +15V SW V x BOOST x DV 7.4V TO 29.5V DD DGND DC-TO-DC LDAC CONVERTER SCLK SDIN DIGITAL SYNC I OUT x INTERFACE SDO R + DAC A SET x CLEAR CURRENT CHARTx FAULT OUTPUT RANGE SCALING ALERT GAIN REG A AD1 OFFSET REG A AD0 DAC CHANNEL A REFOUT REFERENCE REFIN DAC CHANNEL B DAC CHANNEL C AD5737 DAC CHANNEL D NOTES 1. x = A, B, C, OR D. Figure 1. Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20112017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 10067-101AD5737 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Readback Operation .................................................................. 31 Applications ....................................................................................... 1 Device Features ............................................................................... 33 General Description ......................................................................... 1 Fault Output ................................................................................ 33 Product Highlights ........................................................................... 1 Digital Offset and Gain Control ............................................... 33 Companion Products ....................................................................... 1 Status Readback During a Write .............................................. 33 Functional Block Diagram .............................................................. 1 Asynchronous Clear ................................................................... 33 Revision History ............................................................................... 3 Packet Error Checking ............................................................... 34 Detailed Functional Block Diagram .............................................. 4 Watchdog Timer ......................................................................... 34 Specifications ..................................................................................... 5 Alert Output ................................................................................ 34 AC Performance Characteristics ................................................ 7 Internal Reference ...................................................................... 34 Timing Characteristics ................................................................ 7 External Current Setting Resistor ............................................ 34 Absolute Maximum Ratings .......................................................... 10 HART Connectivity ................................................................... 35 Thermal Resistance .................................................................... 10 Digital Slew Rate Control .......................................................... 35 ESD Caution ................................................................................ 10 Dynamic Power Control ............................................................ 36 Pin Configuration and Function Descriptions ........................... 11 DC-to-DC Converters ............................................................... 36 Typical Performance Characteristics ........................................... 14 AI Supply RequirementsStatic .......................................... 37 CC Current Outputs ......................................................................... 14 AICC Supply RequirementsSlewing ...................................... 37 DC-to-DC Converter ................................................................. 18 External PMOS Mode ................................................................ 38 Reference ..................................................................................... 19 Applications Information .............................................................. 40 General ......................................................................................... 20 Current Output Mode with Internal RSET ................................ 40 Terminology .................................................................................... 21 Precision Voltage Reference Selection ..................................... 40 Theory of Operation ...................................................................... 22 Driving Inductive Loads ............................................................ 40 DAC Architecture ....................................................................... 22 Transient Voltage Protection .................................................... 41 Power-On State of the AD5737 ................................................ 22 Microprocessor Interfacing ....................................................... 41 Serial Interface ............................................................................ 22 Layout Guidelines....................................................................... 41 Transfer Function ....................................................................... 23 Galvanically Isolated Interface ................................................. 42 Registers ........................................................................................... 24 Industrial HART Capable Analog Output Application ........ 43 Enabling the Output ................................................................... 25 Outline Dimensions ....................................................................... 44 Reprogramming the Output Range ......................................... 25 Ordering Guide .......................................................................... 44 Data Registers ............................................................................. 26 Control Registers ........................................................................ 28 Rev. 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