Complete Quad, 14-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC Data Sheet AD5744R FEATURES GENERAL DESCRIPTION Complete quad, 14-bit digital-to-analog converter (DAC) The AD5744R is a quad, 14-bit, serial input, bipolar voltage output Programmable output range: 10 V, 10.2564 V, or DAC that operates from supply voltages of 11.4 V to 16.5 V. 10.5263 V Nominal full-scale output range is 10 V. The AD5744R provides 1 LSB maximum INL error, 1 LSB maximum DNL error integrated output amplifiers, reference buffers, and proprietary Low noise: 60 nV/Hz power-up/power-down control circuitry. The part also features Settling time: 10 s maximum a digital I/O port, programmed via the serial interface, and an Integrated reference buffers analog temperature sensor. The part incorporates digital offset Internal reference: 10 ppm/C maximum and gain adjust registers per channel. On-chip die temperature sensor The AD5744R is a high performance converter that provides Output control during power-up/brownout guaranteed monotonicity, integral nonlinearity (INL) of 1 LSB, Programmable short-circuit protection low noise, and 10 s settling time. The AD5744R includes an on- LDAC Simultaneous updating via chip 5 V reference with a reference temperature coefficient of CLR Asynchronous to zero code 10 ppm/C maximum. During power-up when the supply voltages Digital offset and gain adjust are changing, VOUTx is clamped to 0 V via a low impedance path. Logic output control pins The AD5744R is based on the iCMOS technology platform, which DSP-/microcontroller-compatible serial interface is designed for analog systems designers within industrial/instru- Temperature range: 40C to +85C mentation equipment OEMs who need high performance ICs at iCMOS process technology higher voltage levels. iCMOS enables the development of analog APPLICATIONS ICs capable of 30 V and operation at 15 V supplies, while allowing reductions in power consumption and package size, coupled with Industrial automation increased ac and dc performance. Open-loop/closed-loop servo control Process control The AD5744R uses a serial interface that operates at clock rates Data acquisition systems of up to 30 MHz and is compatible with DSP and microcontroller Automatic test equipment interface standards. Double buffering allows the simultaneous Automotive test and measurement updating of all DACs. The input coding is programmable to either High accuracy instrumentation twos complement or offset binary formats. The asynchronous clear function clears all DATA registers to either bipolar zero or zero scale, depending on the coding used. The AD5744R is ideal for both closed-loop servo control and open-loop control applications. The AD5744R is available in a 32-lead TQFP and offers guaranteed specifications over the 40C to +85C industrial temperature range (see Figure 1 for the functional block diagram). Rev. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. 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AD5744R Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Registers........................................................................................... 24 Applications....................................................................................... 1 Function Register ....................................................................... 24 General Description ......................................................................... 1 Data Register............................................................................... 25 Revision History ............................................................................... 2 Coarse Gain Register ................................................................. 25 Functional Block Diagram .............................................................. 3 Fine Gain Register...................................................................... 25 Specifications..................................................................................... 4 Design Features............................................................................... 26 AC Performance Characteristics ................................................ 6 Analog Output Control ............................................................. 26 Timing Characteristics ................................................................ 7 Programmable Short-Circuit Protection ................................ 26 Absolute Maximum Ratings.......................................................... 10 Digital I/O Port........................................................................... 26 Thermal Resistance .................................................................... 10 Die Temperature Sensor............................................................ 26 ESD Caution................................................................................ 10 Local Ground Offset Adjust...................................................... 26 Pin Configuration and Function Descriptions........................... 11 Applications Information .............................................................. 27 Typical Performance Characteristics ........................................... 13 Typical Operating Circuit ......................................................... 27 Terminology .................................................................................... 19 Layout Guidelines........................................................................... 29 Theory of Operation ...................................................................... 21 Galvanically Isolated Interface ................................................. 29 DAC Architecture....................................................................... 21 Microprocessor Interfacing....................................................... 29 Reference Buffers........................................................................ 21 Outline Dimensions....................................................................... 30 Serial Interface ............................................................................ 21 Ordering Guide .......................................................................... 30 Simultaneous Updating via LDAC........................................... 23 Transfer Function ....................................................................... 23 CLR Asynchronous Clear ( )....................................................... 23 REVISION HISTORY 9/11Rev. D to Rev. E 2/09Rev. A to Rev. B Changed 50 MHz to 30 MHz Throughout.................................... 1 Changes to Figure 1...........................................................................3 Changes to t , t , and t Parameters, Table 3.................................. 7 Changes to Table 1 Conditions and Added Endnote 1 2 3 to Table 1.............................................................................................4 7/11Rev. C to Rev. D Added Endnote to Table 2................................................................6 Changed 30 MHz to 50 MHz Throughout.................................... 1 Added Endnote to Table 3................................................................7 Changes to t1, t2, and t3 Parameters, Table 3.................................. 7 Changes to Table 5.......................................................................... 10 8/09Rev. B to Rev. C 1/09Rev. 0 to Rev. A Deleted Endnote 1 in Table 1 .......................................................... 4 Changes to Figure 1...........................................................................3 Deleted Endnote 1 in Table 2 .......................................................... 6 Deleted Endnote 1 and Changes to t Parameter in Table 3 ...... 7 6 10/08Revision 0: Initial Version Rev. E Page 2 of 32