Industrial I/V Output Driver, Single-Supply, 55 V Maximum Supply, Programmable Ranges Data Sheet AD5751 FEATURES GENERAL DESCRIPTION Current output ranges: 0 mA to 20 mA, 0 mA to 24 mA, The AD5751 is a single-channel, low cost, precision, voltage/ or 4 mA to 20 mA current output driver with hardware or software programmable 0.03% FSR typical total unadjusted error (TUE) output ranges. The software ranges are configured via an SPI-/ 5 ppm/C typical output drift MICROWIRE-compatible serial interface. The AD5751 targets 2% overrange applications in PLC and industrial process control. The analog Voltage output ranges: 0 V to 5 V, 0 V to 10 V, 0 V to 40 V input to the AD5751 is provided from a low voltage, single-supply 0.02% FSR typical total unadjusted error (TUE) digital-to-analog converter (DAC) and is internally conditioned 3 ppm/C typical output drift to provide the desired output current/voltage range. Overrange capability on all ranges The output current range is programmable across three current Flexible serial digital interface ranges: 0 mA to 20 mA, 0 mA to 24 mA, or 4 mA to 20 mA. On-chip output fault detection Voltage output is provided from a separate pin that can be PEC error checking configured to provide 0 V to 5 V, 0 V to 10 V, and 0 V to 40 V Asynchronous CLEAR function output ranges. An overrange is available on the voltage ranges. Power supply range AV : 12 V ( 10%) to 55 V (maximum) DD Analog outputs are short-circuit and open-circuit protected and Output loop compliance to AV 2.75 V DD can drive capacitive loads of 1 F and inductive loads of 0.1 H. Temperature range: 40C to +105C The device is specified to operate with a power supply range from 32-lead 5 mm 5 mm LFCSP package 10.8 V to 55 V. Output loop compliance is 0 V to AV 2.75 V. DD APPLICATIONS The flexible serial interface is SPI and MICROWIRE compatible Process control and can be operated in 3-wire mode to minimize the digital Actuator control isolation required in isolated applications. The interface also PLCs features an optional PEC error checking feature using CRC-8 error checking, useful in industrial environments where data communication corruption can occur. The device also includes a power-on reset function ensuring that the device powers up in a known state (0 V or tristate) and an asynchronous CLEAR pin that sets the outputs to zero- scale/midscale voltage output or the low end of the selected current range. An HW SELECT pin is used to configure the part for hardware or software mode on power-up. Table 1. Related Device Part Number Description AD5422 Single-channel, 16-bit, serial input current source and voltage output DAC Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20092018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. AD5751 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 OUTEN ........................................................................................ 24 Applications ....................................................................................... 1 Software Control ........................................................................ 24 General Description ......................................................................... 1 Hardware Control ...................................................................... 26 Revision History ............................................................................... 2 Transfer Function ....................................................................... 26 Functional Block Diagram .............................................................. 3 Detailed Description of Features .................................................. 27 Specifications ..................................................................................... 4 Output Fault AlertSoftware Mode ....................................... 27 Timing Characteristics ................................................................ 7 Output Fault AlertHardware Mode ..................................... 27 Absolute Maximum Ratings ............................................................ 9 Voltage Output Short-Circuit Protection ................................ 27 ESD Caution .................................................................................. 9 Asynchronous Clear (CLEAR) ................................................. 27 Pin Configuration and Function Descriptions ........................... 10 External Current Setting Resistor ............................................ 27 Typical Performance Characteristics ........................................... 12 Programmable Overrange Modes ............................................ 28 Current Output ........................................................................... 15 Packet Error Checking ............................................................... 28 Terminology .................................................................................... 20 Applications Information .............................................................. 29 Theory of Operation ...................................................................... 21 Transient Voltage Protection .................................................... 29 Software Mode ............................................................................ 21 Thermal Considerations ............................................................ 29 Currrent Output Architecture .................................................. 23 Layout Guidelines....................................................................... 30 Driving Inductive Loads ............................................................ 23 Galvanically Isolated Interface ................................................. 30 Power-On State of the AD5751 ................................................ 23 Microprocessor Interfacing ....................................................... 30 Default Registers at Power-On ................................................. 24 Outline Dimensions ....................................................................... 31 Reset Function ............................................................................ 24 Ordering Guide .......................................................................... 31 REVISION HISTORY 10/2013Rev. A to Rev. B 1/2018Rev. C to Rev. D Changed Thermal Impedance from 28C/W to 42C/W Changed CP-32-7 to CP-32-2 ...................................... Throughout (Throughout) .....................................................................................9 Changes to Figure 4 ........................................................................ 10 Added Endnote 1 to Table 4 ............................................................. 9 Updated Outline Dimensions ....................................................... 31 Changes to Table 12 Calculations................................................. 29 Changes to Ordering Guide .......................................................... 31 Updated Outline Dimensions ....................................................... 31 3/2017Rev. B to Rev. C 5/2010Rev. 0 to Rev. A Changed CP-32-2 to CP-32-7 ...................................... Throughout Changes to Table 2, Power Requirements ...................................... 6 Changes to Figure 4 ........................................................................ 10 Updated Outline Dimensions ....................................................... 31 10/2009Revision 0: Initial Version Changes to Ordering Guide .......................................................... 31 Rev. D Page 2 of 32