Quad Channel, 16-Bit, Serial Input, 4 mA to 20 mA and Voltage Output DAC, Dynamic Power Control Data Sheet AD5755 On-chip dynamic power control minimizes package power FEATURES dissipation in current mode. This is achieved by regulating the 16-bit resolution and monotonicity voltage on the output driver from 7.4 V to 29.5 V using a dc-to- Dynamic power control for thermal management dc boost converter optimized for minimum on chip power Current and voltage output pins connectable to a single dissipation. terminal Current output ranges: 0 mA to 20 mA, 4 mA to 20 mA, The part uses a versatile 3-wire serial interface that operates at or 0 mA to 24 mA clock rates of up to 30 MHz and is compatible with standard 0.05% total unadjusted error (TUE) maximum SPI, QSPI, MICROWIRE, DSP, and microcontroller inter- Voltage output ranges (with 20% overrange): 0 V to 5 V, 0 V face standards. The interface also features optional CRC-8 to 10 V, 5 V, and 10 V packet error checking, as well as a watchdog timer that 0.04% total unadjusted error (TUE) maximum monitors activity on the interface. User programmable offset and gain PRODUCT HIGHLIGHTS On-chip diagnostics 1. Dynamic power control for thermal management. On-chip reference (10 ppm/C maximum) 2. 16-bit performance. 40C to +105C temperature range 3. Multichannel. APPLICATIONS COMPANION PRODUCTS Process control Product Family: AD5755-1, AD5757 Actuator control External References: ADR445, ADR02 PLCs Digital Isolators: ADuM1410, ADuM1411 GENERAL DESCRIPTION Power: ADP2302, ADP2303 The AD5755 is a quad, voltage and current output DAC that Additional companion products on the AD5755 product page operates with a power supply range from 26.4 V to +33 V. FUNCTIONAL BLOCK DIAGRAM AV CC 5.0V AV AV SS DD 15V AGND +15V SW V x BOOST x DV 7.4V TO 29.5V DD DGND DC-TO-DC LDAC CONVERTER SCLK SDIN SYNC DIGITAL I OUT x INTERFACE SDO R + DAC A SET x CLEAR CURRENT AND VOLTAGE FAULT OUTPUT RANGE SCALING ALERT GAIN REG A +V SENSE x OFFSET REG A AD1 V OUT x AD0 V DAC CHANNEL A SENSE x REFOUT REFERENCE REFIN DAC CHANNEL B DAC CHANNEL C AD5755 DAC CHANNEL D NOTES 1. x = A, B, C, AND D. Figure 1. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20112017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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Technical Support www.analog.com 07304-100AD5755 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Data Registers ............................................................................. 33 Applications ....................................................................................... 1 Control Registers ........................................................................ 35 General Description ......................................................................... 1 Readback Operation .................................................................. 38 Product Highlights ........................................................................... 1 Device Features ............................................................................... 40 Companion Products ....................................................................... 1 Output Fault ................................................................................ 40 Functional Block Diagram .............................................................. 1 Voltage Output Short-Circuit Protection ................................ 40 Revision History ............................................................................... 3 Digital Offset and Gain Control ............................................... 40 Detailed Functional Block Diagram .............................................. 4 Status Readback During a Write .............................................. 40 Specifications ..................................................................................... 5 Asynchronous Clear ................................................................... 41 AC Performance Characteristics ................................................ 8 Packet Error Checking ............................................................... 41 Timing Characteristics ................................................................ 9 Watchdog Timer ......................................................................... 41 Absolute Maximum Ratings .......................................................... 12 Output Alert ................................................................................ 41 ESD Caution ................................................................................ 12 Internal Reference ...................................................................... 42 Pin Configuration and Function Descriptions ........................... 13 External Current Setting Resistor ............................................ 42 Typical Performance Characteristics ........................................... 16 Digital Slew Rate Control .......................................................... 42 Voltage Outputs .......................................................................... 16 Power Dissipation Control ........................................................ 43 Current Outputs ......................................................................... 20 DC-to-DC Converters ............................................................... 43 DC-to-DC Block ......................................................................... 24 AIcc Supply RequirementsStatic ............................................ 44 Reference ..................................................................................... 25 AICC Supply RequirementsSlewing ...................................... 44 General ......................................................................................... 26 Applications Information .............................................................. 46 Terminology .................................................................................... 27 Voltage and Current Output Ranges on the Same Terminal 46 Theory of Operation ...................................................................... 29 Current Output Mode with Internal R ................................ 46 SET DAC Architecture ....................................................................... 29 Precision Voltage Reference Selection ..................................... 46 Power-On State of AD5755 ....................................................... 29 Driving Inductive Loads ............................................................ 47 Serial Interface ............................................................................ 30 Transient Voltage Protection .................................................... 47 Transfer Function ....................................................................... 30 Microprocessor Interfacing ....................................................... 47 Registers ........................................................................................... 31 Layout Guidelines....................................................................... 47 Programming Sequence to Write/Enable the Output Galvanically Isolated Interface ................................................. 48 Correctly ...................................................................................... 32 Outline Dimensions ....................................................................... 49 Changing and Reprogramming the Range ............................. 32 Ordering Guide .......................................................................... 49 Rev. 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