Quad Channel, 16-Bit, Serial Input, 4 mA to 20 mA Output DAC, Dynamic Power Control, HART Connectivity Data Sheet AD5757 a dc-to-dc boost converter optimized for minimum on-chip FEATURES power dissipation. 16-bit resolution and monotonicity Dynamic power control for thermal management Each channel has a corresponding CHART pin so that HART or external PMOS mode signals can be coupled onto the current output of the AD5757. Current output ranges: 0 mA to 20 mA, 4 mA to 20 mA, The part uses a versatile 3-wire serial interface that operates at or 0 mA to 24 mA clock rates of up to 30 MHz and is compatible with standard 0.05% total unadjusted error (TUE) maximum SPI, QSPI, MICROWIRE, DSP, and microcontroller interface User programmable offset and gain standards. The interface also features optional CRC-8 packet On-chip diagnostics error checking, as well as a watchdog timer that monitors On-chip reference (10 ppm/C maximum) activity on the interface. 40C to +105C temperature range PRODUCT HIGHLIGHTS APPLICATIONS 1. Dynamic power control for thermal management. Process control 2. 16-bit performance. Actuator control 3. Multichannel. Programmable logic controllers (PLCs) 4. HART compliant. HART network connectivity COMPANION PRODUCTS GENERAL DESCRIPTION Product Family: AD5755-1, AD5755 The AD5757 is a quad, current output DAC that operates with a HART Modem: AD5700, AD5700-1 power supply range from 10.8 V to 33 V. On-chip dynamic External References: ADR445, ADR02 power control minimizes package power dissipation by regulat- Digital Isolators: ADuM1410, ADuM1411 ing the voltage on the output driver from 7.4 V to 29.5 V, using Power: ADP2302, ADP2303 Additional companion products on the AD5757 product page FUNCTIONAL BLOCK DIAGRAM AV CC 5.0V AV DD AGND +15V SW V x BOOST x DV 7.4V TO 29.5V DD DGND DC-TO-DC LDAC CONVERTER SCLK SDIN SYNC DIGITAL I OUT x INTERFACE SDO R + DAC A SET x CLEAR CURRENT AND VOLTAGE CHARTx FAULT OUTPUT RANGE SCALING ALERT GAIN REG A AD1 OFFSET REG A AD0 DAC CHANNEL A REFOUT REFERENCE REFIN DAC CHANNEL B DAC CHANNEL C AD5757 DAC CHANNEL D NOTES 1. x = A, B, C, AND D. Figure 1. Rev. G Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20112017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 09225-101AD5757 Data Sheet TABLE OF CONTENTS Features........................................................................................... 1 Readback Operation ................................................................ 32 Applications ................................................................................... 1 Device Features ............................................................................ 34 General Description ...................................................................... 1 Output Fault ............................................................................. 34 Product Highlights ........................................................................ 1 Digital Offset and Gain Control ............................................. 34 Companion Products .................................................................... 1 Status Readback During a Write............................................. 34 Functional Block Diagram ............................................................ 1 Asynchronous Clear ................................................................ 34 Revision History ............................................................................ 3 Packet Error Checking ............................................................ 35 Detailed Functional Block Diagram............................................. 4 Watchdog Timer ...................................................................... 35 Specifications ................................................................................. 5 Output Alert............................................................................. 35 AC Performance Characteristics .............................................. 7 Internal Reference.................................................................... 35 Timing Characteristics .............................................................. 7 External Current Setting Resistor........................................... 35 Absolute Maximum Ratings ....................................................... 10 HART........................................................................................ 36 ESD Caution............................................................................. 10 Digital Slew Rate Control........................................................ 36 Pin Configuration and Function Descriptions.......................... 11 Power Dissipation Control...................................................... 37 Typical Performance Characteristics.......................................... 14 DC-to-DC Converters............................................................. 37 Current Outputs ...................................................................... 14 AI Supply RequirementsStatic ......................................... 38 CC DC-to-DC Block...................................................................... 19 AI Supply RequirementsSlewing ..................................... 38 CC Reference .................................................................................. 20 External PMOS Mode ............................................................. 40 General ..................................................................................... 21 Applications Information............................................................ 41 Terminology ................................................................................. 22 Current Output Mode with Internal R ............................... 41 SET Theory of Operation.................................................................... 23 Precision Voltage Reference Selection.................................... 41 DAC Architecture .................................................................... 23 Driving Inductive Loads ......................................................... 41 Power-On State of the AD5757 .............................................. 23 Transient Voltage Protection................................................... 42 Serial Interface ......................................................................... 23 Microprocessor Interfacing..................................................... 42 Transfer Function .................................................................... 24 Layout Guidelines .................................................................... 42 Registers ....................................................................................... 25 Galvanically Isolated Interface................................................ 43 Programming Sequence to Write/Enable the Output Industrial HART Capable Analog Output Application ........ 44 Correctly................................................................................... 26 Outline Dimensions .................................................................... 45 Changing and Reprogramming the Range ............................ 26 Ordering Guide........................................................................ 45 Data Registers .......................................................................... 27 Control Registers ..................................................................... 29 Rev. G Page 2 of 45