Complete Dual, 16-Bit High Accuracy, Serial Input, 5 V DAC Data Sheet AD5763 FEATURES GENERAL DESCRIPTION Complete dual, 16-bit DAC The AD5763 is a dual, 16-bit, serial input, bipolar voltage Programmable output range output digital-to-analog converter (DAC) that operates from 4.096 V, 4.201 V, or 4.311 V supply voltages of 4.75 V up to 5.25 V. The nominal full- 1 LSB maximum INL error, 1 LSB maximum DNL error scale output range is 4.096 V. The AD5763 provides integrated Low noise: 70 nV/Hz output amplifiers, reference buffers, and proprietary power-up/ Settling time: 10 s maximum power-down control circuitry. The part also features a digital Integrated reference buffers I/O port, which is programmed via the serial interface. The part On-chip die temperature sensor incorporates digital offset and gain adjust registers per channel. Output control during power-up/brownout The AD5763 is a high performance converter that offers guar- Programmable short-circuit protection anteed monotonicity, integral nonlinearity (INL) of 1 LSB, LDAC Simultaneous updating via low noise, and 10 s settling time. During power-up (when the Asynchronous clear to zero code supply voltages are changing), the outputs are clamped to 0 V Digital offset and gain adjust via a low impedance path. Logic output control pins The AD5763 uses a serial interface that operates at clock rates of DSP-/microcontroller-compatible serial interface up to 30 MHz and is compatible with DSP and microcontroller Temperature range: 40C to +105C 1 interface standards. Double buffering allows the simultaneous iCMOS process technology updating of all DACs. The input coding is programmable to either APPLICATIONS twos complement or offset binary formats. The asynchronous clear function clears all DAC registers to either bipolar zero or Industrial automation zero scale depending on the coding used. The AD5763 is ideal Open-loop/closed-loop servo control for both closed-loop servo control and open-loop control appli- Process control cations. The AD5763 is available in a 32-lead TQFP, and offers Data acquisition systems guaranteed specifications over the 40C to +105C industrial Automatic test equipment temperature range. Figure 1 contains a functional block diagram Automotive test and measurement of the AD5763. High accuracy instrumentation Table 1. Related Devices Part No. Description AD5764 Complete quad, 16-bit, high accuracy, serial input, 10 V output DAC AD5765 Complete quad, 16-bit, high accuracy, serial input, 5 V DAC 1 iCMOS, Reg. U.S. Patent and Trademark Office. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20092011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. AD5763 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Data Register............................................................................... 19 Applications....................................................................................... 1 Coarse Gain Register ................................................................. 19 General Description ......................................................................... 1 Fine Gain Register...................................................................... 20 Revision History ............................................................................... 2 Offset Register ............................................................................ 20 Functional Block Diagram .............................................................. 3 Worked Example of Offset and Gain Adjustment ................. 21 Specifications..................................................................................... 4 Design Features............................................................................... 22 AC Performance Characteristics ................................................ 5 Analog Output Control ............................................................. 22 Timing Characteristics ................................................................ 6 Digital Offset and Gain Control............................................... 22 Absolute Maximum Ratings............................................................ 9 Programmable Short-Circuit Protection ................................ 22 ESD Caution.................................................................................. 9 Digital I/O Port........................................................................... 22 Pin Configuration and Function Descriptions........................... 10 Die Temperature Sensor............................................................ 22 Typical Performance Characteristics ........................................... 12 Local Ground Offset Adjust...................................................... 23 Terminology .................................................................................... 15 Power-on Status.......................................................................... 23 Theory of Operation ...................................................................... 16 Applications Information .............................................................. 24 DAC Architecture....................................................................... 16 Typical Operating Circuit ......................................................... 24 Reference Buffers........................................................................ 16 Layout Guidelines........................................................................... 26 Serial Interface ............................................................................ 16 Galvanically Isolated Interface ................................................. 26 Simultaneous Updating via LDAC........................................... 17 Microprocessor Interfacing....................................................... 26 Outline Dimensions....................................................................... 27 Transfer Function ....................................................................... 18 Ordering Guide .......................................................................... 27 CLR Asynchronous Clear ( )....................................................... 18 Function Register ....................................................................... 19 REVISION HISTORY 9/11Rev. B to Rev. C Changed 50 MHz to 30 MHz Throughout.................................... 1 Changes to t , t , and t Parameters, Table 4.................................. 6 1 2 3 Changes to Table 20........................................................................ 25 7/11Rev. A to Rev. B Changed 30 MHz to 50 MHz Throughout.................................... 1 Changes to t1, t2, and t3 Parameters, Table 4.................................. 6 Changes to Table 20........................................................................ 25 10/09Rev. 0 to Rev. A Deleted Endnote 1, Table 2.............................................................. 4 Deleted Endnote 1, Table 3.............................................................. 5 Deleted Endnote 1, Table 4.............................................................. 6 Changes to t6 Parameter, Table 4 .................................................... 6 1/09Revision 0: Initial Version Rev. C Page 2 of 28