Complete Quad, 16-Bit, High Accuracy, Serial Input, 5 V DAC Data Sheet AD5765 FEATURES GENERAL DESCRIPTION Complete quad, 16-bit digital-to-analog converter (DAC) The AD5765 is a quad, 16-bit, serial input, bipolar voltage Programmable output range: 4.096 V, 4.201 V, or 4.311 V output, digital-to-analog converter (DAC) that operates from 1 LSB maximum INL error, 1 LSB maximum DNL error supply voltages of 4.75 V to 5.25 V. The nominal full-scale Low noise: 70 nV/Hz output range is 4.096 V. The AD5765 provides integrated Settling time: 10 s maximum output amplifiers, reference buffers, and proprietary power- Integrated reference buffers up/power-down control circuitry. The part also features a On-chip die temperature sensor digital I/O port, which is programmed via the serial interface. Output control during power-up/brownout The part incorporates digital offset and gain adjustment Programmable short-circuit protection registers per channel. LDAC Simultaneous updating via The AD5765 is a high performance converter that offers CLR Asynchronous to zero code guaranteed monotonicity, integral nonlinearity (INL) of 1 LSB, Digital offset and gain adjustment low noise, and 10 s settling time. During power-up (when the Logic output control pins supply voltages are changing), the outputs are clamped to 0 V DSP-/microcontroller-compatible serial interface via a low impedance path. Temperature range: 40C to +105C 1 The AD5765 uses a serial interface that operates at clock rates of iCMOS process technology up to 30 MHz and is compatible with DSP and microcontroller APPLICATIONS interface standards. Double buffering allows the simultaneous updating of all DACs. The input coding is programmable to Industrial automation either a twos complement or an offset binary format. The Open-/closed-loop servo control asynchronous clear function clears all DAC registers to either Process control bipolar zero or zero scale, depending on the coding used. The Data acquisition systems AD5765 is ideal for both closed-loop servo control and open- Automatic test equipment loop control applications. The AD5765 is available in a 32-lead Automotive test and measurement TQFP and offers guaranteed specifications over the 40C to High accuracy instrumentation +105C industrial temperature range. Figure 1 contains a functional block diagram of the AD5765. Table 1. Related Devices Part No. Description AD5764 Complete quad, 16-bit, high accuracy, serial input, 10 V DAC AD5763 Complete dual, 16-bit, high accuracy, serial input, 5 V DAC 1 For analog systems designers within industrial/instrumentation equipment OEMs who need high performance ICs at higher voltage levels, iCMOS is a technology platform that enables the development of analog ICs capable of 30 V and operating at 15 V supplies, allowing dramatic reductions in power consumption and package size and increased ac and dc performance. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. 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AD5765 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Data Register ............................................................................... 20 Applications ....................................................................................... 1 Coarse Gain Register ................................................................. 20 General Description ......................................................................... 1 Fine Gain Register ...................................................................... 21 Revision History ............................................................................... 2 Offset Register ............................................................................ 21 Functional Block Diagram .............................................................. 3 Offset and Gain Adjustment Worked Example ...................... 22 Specifications ..................................................................................... 4 Design Features ............................................................................... 23 AC Performance Characteristics ................................................ 6 Analog Output Control ............................................................. 23 Timing Characteristics ................................................................ 7 Digital Offset and Gain Control ............................................... 23 Absolute Maximum Ratings .......................................................... 10 Programmable Short-Circuit Protection ................................ 23 Thermal Resistance .................................................................... 10 Digital I/O Port ........................................................................... 23 ESD Caution ................................................................................ 10 Die Temperature Sensor ............................................................ 23 Pin Configuration and Function Descriptions ........................... 11 Local-Ground-Offset Adjustment ........................................... 23 Typical Performance Characteristics ........................................... 13 Power-On Status ......................................................................... 24 Terminology .................................................................................... 16 Applications Information .............................................................. 25 Theory of Operation ...................................................................... 17 Typical Operating Circuit ......................................................... 25 DAC Architecture ....................................................................... 17 Precision Voltage Reference Selection ..................................... 25 Reference Buffers ........................................................................ 17 Layout Guidelines ........................................................................... 26 Serial Interface ............................................................................ 17 Galvanically Isolated Interface ................................................. 26 Simultaneous Updating via LDAC ........................................... 18 Microprocessor Interfacing ....................................................... 26 Outline Dimensions ....................................................................... 27 Transfer Function ....................................................................... 19 Ordering Guide .......................................................................... 27 Asynchronous Clear ( ) ....................................................... 19 CLR Function Register ....................................................................... 20 REVISION HISTORY 10/11Rev. B to Rev. C Changed 50 MHz to 30 MHz ....................................... Throughout Changes to t1, t2, and t3 Parameters, Table 4 .................................. 7 7/11Rev. A to Rev. B Changed 30 MHz to 50 MHz Throughout.................................... 1 Changes to t , t , and t Parameters, Table 4 .................................. 7 1 2 3 Changes to Table 21 ........................................................................ 25 Changes to Ordering Guide .......................................................... 27 10/09Rev. 0 to Rev. A Deleted Endnote 1, Table 2 .............................................................. 4 Deleted Endnote 1, Table 3 .............................................................. 6 Deleted Endnote 1, Table 4 .............................................................. 7 Changes to t Parameter, Table 4 .................................................... 7 6 1/09Revision 0: Initial Version Rev. C Page 2 of 28