Programmable Frequency Scan Waveform Generator Data Sheet AD5932 FEATURES GENERAL DESCRIPTION 1 Programmable frequency profile The AD5932 is a waveform generator offering a programmable No external components necessary frequency scan. Utilizing embedded digital processing that Output frequency up to 25 MHz allows enhanced frequency control, the device generates Preprogrammable frequency profile minimizes number of synthesized analog or digital frequency-stepped waveforms. DSP/microcontroller writes Because frequency profiles are preprogrammed, continuous Sinusoidal/triangular/square wave outputs write cycles are eliminated, thereby freeing up valuable Automatic or single pin control of frequency stepping DSP/microcontroller resources. Waveforms start from a known Power-down mode: 20 A phase and are incremented phase-continuously, which allows Power supply: 2.3 V to 5.5 V phase shifts to be easily determined. Consuming only 6.7 mA, Automotive temperature range: 40C to +125C the AD5932 provides a convenient low power solution to 16-lead, Pb-free TSSOP waveform generation. APPLICATIONS The AD5932 outputs each frequency in the range of interest for a defined length of time and then steps to the next frequency in Frequency scanning/radar the scan range. The length of time the device outputs a particular Network/impedance measurements frequency is preprogrammed, and the device increments the Incremental frequency stimulus frequency automatically or, alternatively, the frequency is Sensory applications incremented externally via the CTRL pin. At the end of the Proximity and motion range, the AD5932 continues to output the last frequency until the device is reset. The AD5932 also offers a digital output via the MSBOUT pin. (continued on Page 3) FUNCTIONAL BLOCK DIAGRAM DVDD CAP/2.5V DGND INTERRUPT STANDBY AGND AVDD AD5932 REGULATOR VCC BUFFER SYNCOUT 2.5V MCLK SYNC BUFFER MSBOUT INCREMENT CONTROLLER CTRL 24-BIT DATA INCR PIPELINED DDS CORE 10-BIT VOUT DAC FREQUENCY / CONTROLLER 24 DATA AND CONTROL SERIAL INTERFACE CONTROL ON-BOARD FULL-SCALE COMP REGISTER REFERENCE CONTROL FSYNC SCLK SDATA Figure 1. 1 Protected by U.S. patent number 6747583. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20062017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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Technical Support www.analog.com 05416-001AD5932 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Serial Interface ............................................................................ 15 Applications ....................................................................................... 1 Powering up the AD5932 .......................................................... 15 General Description ......................................................................... 1 Programming the AD5932 ........................................................ 16 Functional Block Diagram .............................................................. 1 Setting Up the Frequency Scan................................................. 17 Revision History ............................................................................... 2 Activating and Controlling the Scan ....................................... 18 Specifications ..................................................................................... 4 Outputs from the AD5932 ........................................................ 19 Specifications Test Circuit ........................................................... 5 Applications ..................................................................................... 20 Timing Specifications .................................................................. 6 Grounding and Layout .............................................................. 20 Master Clock and Timing Diagrams ......................................... 6 AD5932 to the ADSP-BF527 Interface .................................... 20 Absolute Maximum Ratings ............................................................ 8 AD5932 to 68HC11/68L11 Interface ....................................... 20 ESD Caution .................................................................................. 8 AD5932 to 80C51/80L51 Interface .......................................... 21 Pin Configuration and Function Descriptions ............................. 9 AD5932 to DSP56002 Interface ............................................... 21 Typical Performance Characteristics ........................................... 10 Evaluation Board ............................................................................ 22 Terminology .................................................................................... 14 Schematics ................................................................................... 23 Theory of Operation ...................................................................... 15 Outline Dimensions ....................................................................... 25 Frequency Profile........................................................................ 15 Ordering Guide .......................................................................... 25 REVISION HISTORY 4/2017Rev. B to Rev. C 2/2012Rev. 0 to Rev. A Changes to AD5932 to 68HC11/68L11 Interface Section ........ 20 Changes to Figure 21, Figure 22, Figure 23, Figure 24, and Figure 25 .......................................................................................... 12 11/2016Rev. A to Rev. B Changes to Figure 26, Figure 27, Figure 28, and Figure 29 ....... 13 Changed ADSP-21xx to ADSP-BF527 ........................ Throughout Changes to Features Section............................................................ 1 4/2006Revision 0: Initial Version Changes to AD5932 to the ADSP-BF527 Interface Section and Figure 34 .......................................................................................... 20 Rev. C Page 2 of 28