Monolithic 16-Bit Serial/Byte DACPORT AD660 FEATURES FUNCTIONAL BLOCK DIAGRAM DB0/ Complete 16-bit digital-to-analog function LBE/ DB8/ DB1/DB9/ DB7/ CLEAR SELECT CS SIN DATADIR DB15 On-chip output amplifier 15 14 12 11 5 On-chip buried Zener voltage reference AD660 1 LSB integral linearity 16 HBE 16-BIT LATCH S 13 OUT CONTROL 15-bit monotonic over temperature 17 SER LOGIC SPAN/ 10k Microprocessor compatible 22 BIPOLAR 18 CLR 16-BIT LATCH OFFSET Serial or byte input 10.05k LDAC 19 Double-buffered latches 10k Fast (40 ns) write pulse REF IN 23 16-BIT DAC 21 V OUT Asynchronous clear (to 0 V) function Serial output pin facilitates daisy-chaining 10V REF 20 AGND Unipolar or bipolar output Low glitch: 15 nV-s 24 1 2 3 4 V +V +V REF OUT EE CC LL DGND Low THD + N: 0.009% Figure 1. GENERAL DESCRIPTION The AD660 DACPORT is a complete 16-bit monolithic digital- is also available compliant to MIL-STD-883. Refer to the to-analog converter with an on-board voltage reference, double- AD660SQ/883B military data sheet for specifications and test buffered latches, and an output amplifier. It is manufactured on conditions. the Analog Devices, Inc., BiMOS II process. This process allows PRODUCT HIGHLIGHTS the fabrication of low power CMOS logic functions on the same 1. The AD660 is a complete 16-bit DAC, with a voltage chip as high precision bipolar linear circuitry. reference, double-buffered latches, and an output amplifier The AD660 architecture ensures 15-bit monotonicity over time on a single chip. and temperature. Integral and differential nonlinearity is main- 2. The internal buried Zener reference is laser trimmed to tained at 0.003% maximum. The on-chip output amplifier 10.000 V with a 0.1% maximum error and a temperature provides a voltage output settling time of 10 s to within LSB for drift performance of 15 ppm/C. The reference is available a full-scale step. for external applications. The AD660 has an extremely flexible digital interface. Data can 3. The output range of the AD660 is pin programmable and be loaded into the AD660 in serial mode or as two 8-bit bytes. can be set to provide a unipolar output range of 0 V to 10 V This is made possible by two digital input pins that have dual or a bipolar output range of 10 V to +10 V. No external functions. The serial mode input format is pin selectable to be components are required. MSB or LSB first. The serial output pin allows the user to daisy- 4. The AD660 is both dc and ac specified. DC specifications chain several AD660 devices by shifting the data through the include 1 LSB INL and 1 LSB DNL errors. AC specifica- input latch into the next DAC, thus minimizing the number of tions include 0.009% THD + N and 83 dB SNR. CS control lines required to SIN, and LDAC. The byte mode input 5. The double-buffered latches on the AD660 eliminate data format is also flexible in that the high byte or low byte data can skew errors and allow simultaneous updating of DACs in be loaded first. The double buffered latch structure eliminates multiDAC applications. 6. The clear function can asynchronously set the output data skew errors and provides for simultaneous updating of DACs to 0 V regardless of whether the DAC is in unipolar or in a multiDAC system. bipolar mode. The AD660 is available in five grades. AN and BN versions are 7. The output amplifier settles within 10 s to LSB for a specified from 40C to +85C and are packaged in a 24-lead full-scale step and within 2.5 s for a 1 LSB step over tempera- 300 mil plastic DIP. AR and BR versions are also specified from ture. The output glitch is typically 15 nV-s when a full-scale 40C to +85C and are packaged in a 24-lead SOIC. The SQ step is loaded. version is packaged in a 24-lead 300 mil CERDIP package and Rev. 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