2 LC MOS Quad 8-Bit DAC with Separate Reference Inputs AD7225 FEATURES FUNCTIONAL BLOCK DIAGRAM V A V B V C V D V REF REF REF REF DD Four 8-bit DACs with output amplifiers Separate reference input for each DAC INPUT DAC DAC A A V A OUT Microprocessor compatible with double-buffered inputs LATCH A LATCH A Simultaneous update of all 4 outputs INPUT DAC Operates with single or dual supplies DAC B B V B OUT DB7 LATCH B LATCH B DATA Extended temperature range operation (8-BIT) INPUT DAC No user trims required DB0 DAC C C V C OUT LATCH C LATCH C Skinny 24-lead PDIP, CERDIP, SOIC, and SSOP packages 28-lead PLCC package INPUT DAC DAC D D V D OUT LATCH D LATCH D WR CONTROL AD7225 A1 LOGIC A2 LDAC V AGND DGND SS Figure 1. GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD7225 contains four 8-bit voltage output digital-to- 1. DACs and Amplifiers on CMOS Chip. analog converters, with output buffer amplifiers and interface The single-chip design of four 8-bit DACs and amplifiers logic on a single monolithic chip. Each DAC has a separate allows a dramatic reduction in board space requirements reference input terminal. No external trims are required to and offers increased reliability in systems using multiple achieve full specified performance for the part. converters. Its pinout is aimed at optimizing board layout with all analog inputs and outputs at one end of the The double-buffered interface logic consists of two 8-bit package and all digital inputs at the other. registers per channelan input register and a DAC register. Control Input A0 and Control Input A1 determine which input 2. Single- or Dual-Supply Operation. WR The voltage-mode configuration of the AD7225 allows register is loaded when goes low. Only the data held in the single-supply operation. The part can also be operated with DAC registers determines the analog outputs of the converters. dual supplies, giving enhanced performance for some The double-buffering allows simultaneous update of all four parameters. outputs under control of LDAC. All logic inputs are TTL and CMOS (5 V) level compatible, and the control logic is speed 3. Versatile Interface Logic. compatible with most 8-bit microprocessors. The AD7225 has a common 8-bit data bus with individual DAC latches, providing a versatile control architecture for Specified performance is guaranteed for input reference simple interface to microprocessors. The double-buffered voltages from 2 V to 12.5 V when using dual supplies. The part interface allows simultaneous update of the four outputs. is also specified for single-supply operation using a reference of 10 V. Each output buffer amplifier is capable of developing 10 V 4. Separate Reference Input for Each DAC. across a 2 k load. The AD7225 offers great flexibility in dealing with input signals, with a separate reference input provided for each The AD7225 is fabricated on an all ion-implanted, high speed, 2 DAC and each reference having variable input voltage linear-compatible CMOS (LC MOS) process, which is capability. specifically developed to integrate high speed digital logic circuits and precision analog circuitry on the same chip. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2010 Analog Devices, Inc. All rights reserved. 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DATA BUS 00986-001AD7225 TABLE OF CONTENTS Features .............................................................................................. 1 Digital Inputs Section ...................................................................9 Functional Block Diagram .............................................................. 1 Interface Logic Information .......................................................... 10 General Description ......................................................................... 1 Ground Management and Layout ................................................ 11 Product Highlights ........................................................................... 1 Specification Ranges ...................................................................... 12 Revision History ............................................................................... 2 Unipolar Output Operation .......................................................... 13 Specif icat ions ..................................................................................... 3 Bipolar Output Operation ............................................................. 14 Single Supply ................................................................................. 4 AGND Bias ...................................................................................... 15 Absolute Maximum Ratings ............................................................ 5 AC Reference Signal ....................................................................... 16 ESD Caution .................................................................................. 5 Applications Information .............................................................. 17 Pin Configurations and Function Descriptions ........................... 6 Programmable Transversal Filter ............................................. 17 Typical Performance Characteristics ............................................. 7 Digital Word Multiplication ..................................................... 18 Terminology ...................................................................................... 8 Microprocesser Interface ............................................................... 19 Circuit Information .......................................................................... 9 V Generation ................................................................................ 20 SS Digital-to-Analog Section ........................................................... 9 Outline Dimensions ....................................................................... 21 Op Amp Section ........................................................................... 9 Ordering Guide .......................................................................... 23 REVISION HISTORY 3/10Rev. B to Rev. C Updated Format .................................................................. Universal Deleted 28-Terminal Leadless Ceramic Chip Carrier Package ................................................................................. Universal Added 24-Lead SSOP Package .......................................... Universal Changes to Features Section............................................................ 1 Changes to Table 1 ............................................................................ 3 Changes to Table 2 ............................................................................ 4 Changes to Table 3 ............................................................................ 5 Changes to Pin Configurations and Function Descriptions Section ................................................................................................ 6 Added Table 4 Renumbered Sequentially .................................... 6 Changes to Specification Ranges section .................................... 12 Changes to Programmable Transversal Filter Section and Figure 21 .......................................................................................... 17 Updated Outline Dimensions ....................................................... 21 Changes to Ordering Guide .......................................................... 23 Rev. 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