2 LC MOS a Dual 12-Bit DACPORTs AD7237A/AD7247A FUNCTIONAL BLOCK DIAGRAMS FEATURES Complete Dual 12-Bit DAC Comprising Two 12-Bit CMOS DACs On-Chip Voltage Reference Output Amplifiers Reference Buffer Amplifiers Improved AD7237/AD7247: 12 V to 15 V Operation Faster Interface 30 ns typ Data Setup Time Parallel Loading Structure: AD7247A (8+4) Loading Structure: AD7237A Single or Dual Supply Operation Low Power165 mW typ in Single Supply GENERAL DESCRIPTION The AD7237A/AD7247A is an enhanced version of the industry standard AD7237/AD7247. Improvements include operation from 12 V to 15 V supplies, faster interface times and better reference variations with V . Additional features include faster DD settling times. The AD7237A/AD7247A is a complete, dual, 12-bit, voltage output digital-to-analog converter with output amplifiers and Zener voltage reference on a monolithic CMOS chip. No exter- nal user trims are required to achieve full specified performance. Both parts are microprocessor compatible, with high speed data latches and interface logic. The AD7247A accepts 12-bit paral- lel data which is loaded into the respective DAC latch using the WR input and a separate Chip Select input for each DAC. The AD7237A has a double buffered interface structure and an 8-bit wide data bus with data loaded to the respective input latch in two write operations. An asynchronous LDAC signal on the AD7237A updates the DAC latches and analog outputs. A REF OUT/REF IN function is provided which allows either the on-chip 5 V reference or an external reference to be used as a reference voltage for the part. For single supply operation, two PRODUCT HIGHLIGHTS output ranges of 0 V to +5 V and 0 V to +10 V are available, 1. The AD7237A/AD7247A is a dual 12-bit DACPORT on a while these two ranges plus an additional 5 V range are avail- single chip. This single chip design and small package size able with dual supplies. The output amplifiers are capable of de- offer considerable space saving and increased reliability over veloping +10 V across a 2 k load to GND. multichip designs. The AD7237A/AD7247A is fabricated in Linear Compatible 2. The improved interface times of the parts allow easy, direct 2 CMOS (LC MOS), an advanced, mixed technology process interfacing to most modern microprocessors, whether they that combines precision bipolar circuits with low power CMOS have 8-bit or 16-bit data bus structures. logic. Both parts are available in a 24-pin, 0.3 wide plastic and 3. The AD7237A/AD7247A features a wide power supply hermetic dual-in-line package (DIP) and are also packaged in a range allowing operation from 12 V supplies. 24-lead small outline (SOIC) package. DACPORT is a registered trademark of Analog Devices, Inc. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 617/329-4700 Fax: 617/326-87031 1 (V = +12 V to +15 V, V = 0 V or 12 V to 15 V, AGND = DD SS AD7237A/AD7247ASPECIFICATIONS DGND = 0 V AD7237A , GND = 0 V AD7247A , REF IN = +5 V, R = 2 k, C = 100 pF. All specifications T to T unless otherwise noted.) L L MIN MAX 2 2 2 Parameter A B T Units Test Conditions/Comments STATIC PERFORMANCE Resolution 12 12 12 Bits 3 Relative Accuracy 1 1/2 1/2 LSB max 3 Differential Nonlinearity 0.9 0.9 0.9 LSB max Guaranteed Monotonic 3 4 Unipolar Offset Error 3 3 4 LSB max V = 0 V or 12 V to 15 V . DAC Latch Contents All 0s SS 3 4 Bipolar Zero Error 6 4 6 LSB max V = 12 V to 15 V . DAC Latch Contents SS 1000 0000 0000 3, 5 Full-Scale Error 5 5 6 LSB max 5 Full-Scale Mismatch 1 1 1 LSB typ REFERENCE OUTPUT REF OUT 4.97/5.03 4.97/5.03 4.95/5.05 V min/max Reference Temperature Coefficient 25 25 25 ppm/C typ Reference Load Change (REF OUT vs. I) 1 1 1 mV max Reference Load Current Change (0-100 A) REFERENCE INPUT Reference Input Range 4.75/5.25 4.75/5.25 4.75/5.25 V min/max 5 V 5% 6 Input Current 5 5 5 A max DIGITAL INPUTS Input High Voltage, V 2.4 2.4 2.4 V min INH Input Low Voltage, V 0.8 0.8 0.8 V max INL Input Current I (Data Inputs) 10 10 10 A max V = 0 V to V IN IN DD 6 Input Capacitance 8 8 8 pF max ANALOG OUTPUTS Output Range Resistors 15/30 15/30 15/30 k min/max 7 Output Voltage Ranges +5, +10 +5, +10 V Single Supply (V = 0 V) SS 7 4 Output Voltage Ranges +5, +10, 5 +5, +10, 5 +5, +10, 5 Dual Supply (V = 12 V to 15 V ) SS DC Output Impedance 0.5 0.5 0.5 typ 6 AC CHARACTERISTICS Voltage Output Settling Time Settling Time to Within 1/2 LSB of Final Value Positive Full-Scale Change 8 8 10 s max DAC Latch all 0s to all 1s. Typically 5 s Negative Full-Scale Change 8 8 10 s max DAC Latch all 1s to all 0s. Typically 5 s 4 V = 12 V to 15 V . SS Digital-to-Analog Glitch 3 Impulse 30 30 30 nV secs typ DAC Latch Contents Toggled Between all 0s and all 1s 3 Digital Feedthrough 10 10 10 nV secs typ 3 Digital Crosstalk 30 30 30 nV secs typ POWER REQUIREMENTS V +10.8/+16.5 +11.4/+15.75 +11.4/+15.75 V min/max For Specified Performance Unless Otherwise Stated DD V 10.8/16.5 11.4/15.75 11.4/15.75 V min/max For Specified Performance Unless Otherwise Stated SS I 15 15 15 mA max Output Unloaded. Typically 10 mA DD I (Dual Supplies) 5 5 5 mA max Output Unloaded. Typically 3 mA SS NOTES 1 Power Supply tolerance is 10% for A version and 5% for B and T versions. 2 Temperature ranges are as follows: A, B Versions, 40C to +85C T Version, 55C to +125C. 3 See Terminology. 4 With appropriate power supply tolerances. 5 Measured with respect to REF IN and includes unipolar/bipolar offset error. 6 Sample tested +25C to ensure compliance. 7 0 V to +10 V range is only available with V 14.25 V. DD Specifications subject to change without notice. 2 REV. 0