2.7 V to 5.5 V, Parallel Input a Dual Voltage Output 8-Bit DAC AD7302 FEATURES FUNCTIONAL BLOCK DIAGRAM Two 8-Bit DACs In One Package 20-Lead DIP/SOIC/TSSOP Package AD7302 +2.7 V to +5.5 V Operation INPUT DAC Internal and External Reference Capability I DAC A I/V V A OUT REGISTER REGISTER DAC Power-Down Function Parallel Interface D7 INPUT DAC I DAC B I/V V B OUT On-Chip Output Buffer REGISTER REGISTER D0 Rail-to-Rail Operation A/B POWER ON Low Power Operation 3 mA max 3.3 V MUX CONTROL RESET WR Power-Down to 1 mA max 258C LOGIC CS 2 AGND APPLICATIONS Portable Battery Powered Instruments REFIN V DGND LDAC DD PD CLR Digital Gain and Offset Adjustment Programmable Voltage and Current Sources Programmable Attenuators GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD7302 is a dual, 8-bit voltage out DAC that operates 1. Low Power, Single Supply Operation. This part operates from a single +2.7 V to +5.5 V supply. Its on-chip precision from a single +2.7 V to +5.5 V supply and typically consumes output buffers allow the DAC outputs to swing rail to rail. The 15 mW at 5 V, making it ideal for battery powered applications. AD7302 has a parallel microprocessor and DSP-compatible 2. The on-chip output buffer amplifiers allow the outputs of the interface with high speed registers and double buffered interface DACs to swing rail to rail with a settling time of typically 1.2 s. logic. Data is loaded to the registers on the rising edge of CS or 3. Internal or external reference capability. WR and the A/B pin selects either DAC A or DAC B. 4. High speed parallel interface. Reference selection for AD7302 can be either an internal reference derived from the V or an external reference applied DD 5. Power-Down Capability. When powered down the DAC at the REFIN pin. Both DACs can be simultaneously updated consumes less than 1 A at 25C. using the asynchronous LDAC input and can be cleared by 6. Packaged in 20-lead DIP, SOIC and TSSOP packages. using the asynchronous CLR input. The low power consumption of this part makes it ideally suited to portable battery operated equipment. The power consump- tion is less than 10 mW at 3.3 V, reducing to 3 W in power- down mode. The AD7302 is available in a 20-pin plastic dual-in-line package, 20-lead SOIC and a 20-lead TSSOP package. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties Tel: 617/329-4700 World Wide Web Site: (V = +2.7 V to +5.5 V, Internal Reference C = 100 pF, R = 10 kV to V and GND DD L L DD to T unless otherwise noted) AD7302SPECIFICATIONS MAX 1 Parameter B Versions Units Conditions/Comments STATIC PERFORMANCE Resolution 8 Bits Relative Accuracy 1 LSB max Note 2 Differential Nonlinearity 1 LSB max Guaranteed Monotonic Full-Scale Error 0.75 LSB typ Zero Code Error 25C 3 LSB typ All Zeroes Loaded to DAC Register 3 1 % FSR typ Gain Error Zero Code Temperature Coefficient 100 V/C typ DAC REFERENCE INPUT REFIN Input Range 1.0 to V /2 V min to max DD REFIN Input Impedance 10 M typ OUTPUT CHARACTERISTICS Output Voltage Range 0 to V V min to max DD Output Voltage Settling Time 2 s max Typically 1.2 s Slew Rate 7.5 V/s typ Digital to Analog Glitch Impulse 1 nV-s typ 1 LSB Change Around Major Carry Digital Feedthrough 0.2 nV-s typ Digital Crosstalk 0.2 nV-s typ Analog Crosstalk 0.2 LSB typ DC Output Impedance 40 typ Short Circuit Current 14 mA typ 4 Power Supply Rejection Ratio 0.0003 %/% max V = 10% DD LOGIC INPUTS Input Current 10 A max V , Input Low Voltage 0.8 V max V = +5 V INL DD V , Input Low Voltage 0.6 V max V = +3 V INL DD V , Input High Voltage 2.4 V min V = +5 V INH DD V , Input High Voltage 2.1 V min V = +3 V INH DD Pin Capacitance 7 pF max POWER REQUIREMENTS V 2.7/5.5 V min/max DD Both DACs Active and Excluding Load Currents I DD = 3.3 V V = V and V = GND V DD IH DD IL 25C 2.8 mA max Typically 2.3 mA to T 3 mA max See Figures 6 and 7 T MIN MAX = 5.5 V V = V and V = GND V DD IH DD IL 25C 4.5 mA max Typically 2.8 mA to T 5 mA max See Figures 6 and 7 T MIN MAX (Full Power-Down) I DD = V and V = GND 25C1 A max V IH DD IL T to T 2 A max See Figure 18 MIN MAX NOTES 1 Temperature ranges are as follows: B Version: 40C to +105C. 2 Relative Accuracy is calculated using a reduced code range of 15 to 245. 3 Gain error is specified between Codes 15 and 245. The actual error at Code 15 is typically 3 LSB. 4 Guaranteed by characterization at product release, not production tested. Specifications subject to change without notice. 2 REV. 0