Low Cost, Low Power CMOS a General Purpose Analog Front End AD73311L FEATURES GENERAL DESCRIPTION 16-Bit A/D Converter The AD73311L is a complete front-end processor for general 16-Bit D/A Converter purpose applications including speech and telephony. It features Programmable Input/Output Sample Rates a 16-bit A/D conversion channel and a 16-bit D/A conversion 76 dB ADC SNR channel. Each channel provides 70 dB signal-to-noise ratio over 77 dB DAC SNR a voiceband signal bandwidth. The nal channel bandwidth can Programmable Sampling Rate be reduced, and signal-to-noise ratio improved, by external 64 kS/s Maximum Sample Rate digital ltering in a DSP engine. 90 dB Crosstalk The AD73311L is suitable for a variety of applications in the Low Group Delay (25 ms Typ per ADC Channel, speech and telephony area, including low bit rate, high quality 50 ms Typ per DAC Channel) compression, speech enhancement, recognition and synthesis. Programmable Input/Output Gain The low group delay characteristic of the part makes it suitable Flexible Serial Port Which Allows Up to Eight Devices for single or multichannel active control applications. to Be Connected in Cascade The gains of the A/D and D/A conversion channels are program- Single (+3 V) Supply Operation mable over 38 dB and 21 dB ranges respectively. An on-chip 33 mW Max Power Consumption at 2.7 V reference voltage is included to allow single supply operation. On-Chip Reference A serial port (SPORT) allows easy interfacing of single or cas- 20-Lead SOIC/SSOP/TSSOP Packages caded devices to industry standard DSP engines. APPLICATIONS The AD73311L is available in 20-lead SOIC, SSOP and General Purpose Analog I/O TSSOP packages. Speech Processing Cordless and Personal Communications Telephony Active Control of Sound and Vibration Data Communications FUNCTIONAL BLOCK DIAGRAM AVDD1 AVDD2 DVDD SDI VINP ANALOG ANALOG LOOPBACK/ 0/38dB SIGMA-DELTA DECIMATOR SDIFS SINGLE-ENDED PGA MODULATOR ENABLE VINN SCLK SERIAL SDO I/O PORT SDOFS VOUTP SWITCHED- CONTINUOUS DIGITAL 1-BIT SE +6/15dB TIME CAPACITOR SIGMA-DELTA INTERPOLATOR DAC PGA LOW-PASS FILTER LOW-PASS FILTER MODULATOR VOUTN MCLK RESET REFCAP REFERENCE AD73311L REFOUT AGND1 DGND AGND2 REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or Tel: 781/329-4700 World Wide Web Site: (AVDD = DVDD = 2.7 V to 3.3 V DGND = AGND = 0 V, f = 16.384 MHz, DMCLK 1 F = 8 kHz T = T to T , unless otherwise noted.) AD73311LSPECIFICATIONS S A MIN MAX AD73311LA Parameter Min Typ Max Unit Test Conditions/Comments REFERENCE REFCAP Absolute Voltage, V 1.08 1.2 1.32 V REFCAP REFCAP TC 50 ppm/C 0.1 F Capacitor Required from REFOUT REFCAP to AGND2 Typical Output Impedance 145 Absolute Voltage, V 1.08 1.2 1.32 V Unloaded REFOUT Minimum Load Resistance 1 k Maximum Load Capacitance 100 pF ADC SPECIFICATIONS 2, 3 Maximum Input Range at VIN 1.578 V p-p Measured Differentially 2.85 dBm Max Input = (1.578/1.2) V REFCAP Nominal Reference Level at VIN 1.0954 V p-p Measured Differentially (0 dBm0) 6.02 dBm Absolute Gain PGA = 0 dB 2.2 0.6 +1.0 dB 1.0 kHz, 0 dBm0 PGA = 38 dB 1.0 dB 1.0 kHz, 0 dBm0 Gain Tracking Error 0.1 dB 1.0 kHz, +3 dBm0 to 50 dBm0 Signal to (Noise + Distortion) Refer to Figure 5a PGA = 0 dB 71 76 dB 300 Hz to 3400 Hz 70 74 dB 0 Hz to f /2 SAMP 72 dB 300 Hz to 3400 Hz f = 64 kHz SAMP 56 dB 0 Hz to f /2 f = 64 kHz SAMP SAMP PGA = 38 dB 60 dB 300 Hz to 3.4 kHz 59 dB 0 Hz to f /2 SAMP Total Harmonic Distortion PGA = 0 dB 85 75 dB 300 Hz to 3.4 kHz PGA = 38 dB 85 dB 300 Hz to 3.4 kHz Intermodulation Distortion 82 dB PGA = 0 dB Idle Channel Noise 76 dBm0 PGA = 0 dB Crosstalk 100 dB ADC Input Signal Level: 1.0 kHz, 0 dBm0 DAC Input at Idle DC Offset 20 +2 +25 mV PGA = 0 dB Power Supply Rejection 84 dB Input Signal Level at AVDD and DVDD Pins 1.0 kHz, 100 mV p-p Sine Wave 4, 5 Group Delay 25 s 64 kHz Output Sample Rate 2, 4 6 Input Resistance at VIN 45 k DMCLK = 16.384 MHz DAC SPECIFICATIONS 2 Maximum Voltage Output Swing Single-Ended 1.578 V p-p PGA = 6 dB 2.85 dBm Max Output = (1.578/1.2) V REFCAP Differential 3.156 V p-p PGA = 6 dB 3.17 dBm Max Output = 2 ((1.578/1.2) V REFCAP Nominal Voltage Output Swing (0 dBm0) Single-Ended 1.0954 V p-p PGA = 6 dB 6.02 dBm Differential 2.1909 V p-p PGA = 6 dB 0 dBm 4 Output Bias Voltage 1.08 1.2 1.32 V REFOUT Unloaded Absolute Gain 1.8 0.7 +0.4 dB 1.0 kHz, 0 dBm0 Gain Tracking Error 0.1 dB 1.0 kHz, +3 dBm0 to 50 dBm0 Signal to (Noise + Distortion) Refer to Figure 5b PGA = 0 dB 70 77 dB 300 Hz to 3.4 kHz Frequency Range 76 dB 300 Hz to 3400 Hz f = 64 kHz SAMP PGA = 6 dB 77 dB 300 Hz to 3.4 kHz Frequency Range 77 dB 300 Hz to 3400 Hz f = 64 kHz SAMP Total Harmonic Distortion PGA = 0 dB 80 70 dB PGA = 6 dB 80 dB Intermodulation Distortion 76 dB PGA = 0 dB Idle Channel Noise 82 dBm0 PGA = 0 dB Crosstalk 100 dB ADC Input Signal Level: AGND DAC Output Signal Level: 1.0 kHz, 0 dBm0 2 REV. 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