CMOS, 12-Bit, Monolithic Multiplying DAC Data Sheet AD7541A FEATURES FUNCTIONAL BLOCK DIAGRAM 10k 10k 10k Improved version of the obsoleted product, AD7541 V REF Full 4 quadrant multiplication 20k 20k 20k 20k 20k 12-bit linearity (endpoint) S1 S2 S3 S12 All parts guaranteed monotonic OUT 2 TTL/CMOS compatible OUT 1 Protection Schottky diodes not required 10k Low logic input leakage R FEEDBACK BIT 1 (MSB) BIT 2 BIT 3 BIT 12 (LSB) DIGITAL INPUTS (DTL/TTL/CMOS COMPATIBLE) APPLICATIONS LOGIC: A SWITCH IS CLOSED TO I FOR OUT 1 ITS DIGITAL INPUT IN A HIGH STATE. Waveform generators Figure 1. Analog processing Instrumentation applications Programmable amplifiers and attenuators Digitally controlled calibration Programmable filters and oscillators Composite video Ultrasound Gain, offset, and voltage trimming GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD7541A is a high performance, 12-bit monolithic CompatibilityThe AD7541A can be used as a direct replacement multiplying digital-to-analog converter (DAC). It is fabricated for any AD7541 type device. As with the AD7541, The digital using advanced, low noise, thin film, complementary metal- inputs on the AD7541A are TTL/CMOS compatible. They have oxide semiconductor (CMOS) technology. The AD7541A is a 1 A maximum input current requirement so that they do available in 18-lead PDIP, 18-lead PLCC, and 18-lead SOIC not load the driving circuitry. packages. ImprovementsThe AD7541A offers the following improved The AD7541A is functionally and pin compatible with the specifications over the AD7541: industry standard AD7541, and it offers improved specifications 1. Gain error for all grades are reduced with premium grade and performance over the obsolete product, AD7541. The versions having a maximum gain error of 3 LSB. improved design ensures that the AD7541A is latch-up free 2. Gain error temperature coefficient are reduced to therefore, no output protection Schottky diodes are required. 2 ppm/C typical and 5 ppm/C maximum. The AD7541A uses laser wafer trimming to provide full 12-bit 3. Digital-to-analog charge injection energy for the AD7541A endpoint linearity with several high performance grades. is typically 20% less than the standard AD7541. 4. Latch-up proof. 5. Laser wafer trimming provides 1/2 LSB maximum differential nonlinearity for top grade devices over the operating temperature range (vs. 1 LSB on previous AD7541 devices). 6. All grades are guaranteed monotonic to 12 bits over the operating temperature range. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 00718-001AD7541A Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Terminology .......................................................................................7 Applications ....................................................................................... 1 Theory of Operation .........................................................................8 Functional Block Diagram .............................................................. 1 Equivalent Circuit Analysis .........................................................8 General Description ......................................................................... 1 Applications Information .................................................................9 Product Highlights ........................................................................... 1 Unipolar Binary Operation (Two Quadrant Multiplication) ......9 Revision History ............................................................................... 2 Bipolar Operation (Four Quadrant Multiplication) .............. 10 Specifications ..................................................................................... 3 Applications Hints ...................................................................... 11 AC Performance Characteristics ................................................ 4 Single-Supply Operation ........................................................... 11 Absolute Maximum Ratings ............................................................ 5 Supplemental Application Material ......................................... 11 ESD Caution .................................................................................. 5 Outline Dimensions ....................................................................... 12 Pin Configurations ........................................................................... 6 Ordering Guide .......................................................................... 13 REVISION HISTORY 3/2017Rev. B to Rev. C Updated Format .................................................................. Universal Deleted E-20A and Q-18 .............................................. Throughout Added Applications Section ............................................................ 1 Changes to the General Description Section ................................ 1 Changes to Figure 7 .......................................................................... 9 Changes to Bipolar Operation (Four Quadrant Multiplication) Section, Figure 8, and Figure 9 ..................................................... 10 Changes to Figure 10 ...................................................................... 11 Changes to Output Offset Section, Temperature Coefficient Section, Single-Supply Operation Section, and Supplemental Application Material Section ........................................................ 11 Update Outline Dimensions ......................................................... 13 Changes to Ordering Guide .......................................................... 14 Rev. C Page 2 of 13