CMOS a 12-Bit Monolithic Multiplying DAC AD7541A FEATURES FUNCTIONAL BLOCK DIAGRAM Improved Version of AD7541 10k 10k 10k Full Four-Quadrant Multiplication V REF 12-Bit Linearity (Endpoint) 20k 20k 20k 20k 20k All Parts Guaranteed Monotonic S1 S2 S3 S12 TTL/CMOS Compatible Low Cost Protection Schottky Diodes Not Required OUT2 Low Logic Input Leakage OUT1 10k R FEEDBACK GENERAL DESCRIPTION BIT 1 (MSB) BIT 2 BIT 3 BIT 12 (LSB) The Analog Devices AD7541A is a low cost, high performance DIGITAL INPUTS (DTL/TTL/CMOS COMPATIBLE) 12-bit monolithic multiplying digital-to-analog converter. It is LOGIC: A SWITCH IS CLOSED TO I FOR OUT1 fabricated using advanced, low noise, thin film on CMOS ITS DIGITAL INPUT IN AHIG STATE. technology and is available in a standard 18-lead DIP and in 20-terminal surface mount packages. PRODUCT HIGHLIGHTS Compatibility: The AD7541A can be used as a direct replace- The AD7541A is functionally and pin compatible with the in- ment for any AD7541-type device. As with the Analog Devices dustry standard AD7541 device and offers improved specifica- AD7541, the digital inputs are TTL/CMOS compatible and tions and performance. The improved design ensures that the have been designed to have a 1 A maximum input current device is latch-up free so no output protection Schottky diodes requirement so as not to load the driving circuitry. are required. Improvements: The AD7541A offers the following improved This new device uses laser wafer trimming to provide full 12-bit specifications over the AD7541: endpoint linearity with several new high performance grades. 1. Gain Error for all grades has been reduced with premium 1 ORDERING GUIDE grade versions having a maximum gain error of 3 LSB. 2. Gain Error temperature coefficient has been reduced to Relative Gain 2 ppm/C typical and 5 ppm/C maximum. Temperature Accuracy Error Package 2 3 Model Range T to T T = +258C Options MIN MAX A 3. Digital-to-analog charge injection energy for this new device AD7541AJN 0C to +70C 1 LSB 6 LSB N-18 is typically 20% less than the standard AD7541 part. AD7541AKN 0C to +70C 1/2 LSB 1 LSB N-18 4. Latch-up proof. AD7541AJP 0C to +70C 1 LSB 6 P-20A AD7541AKP 0C to +70C 1/2 LSB 1 P-20A 5. Improvements in laser wafer trimming provides 1/2 LSB max AD7541AKR 0C to +70C 1/2 LSB 1 R-18 differential nonlinearity for top grade devices over the operat- AD7541AAQ 25C to +85C 1 LSB 6 LSB Q-18 ing temperature range (vs. 1 LSB on older 7541 types). AD7541ABQ 25C to +85C 1/2 LSB 1 LSB Q-18 AD7541ASQ 55C to +125C 1 LSB 6 LSB Q-18 6. All grades are guaranteed monotonic to 12 bits over the AD7541ATQ 55C to +125C 1/2 LSB 1 LSB Q-18 operating temperature range. AD7541ASE 55C to +125C 1 LSB 6 LSB E-20A AD7541ATE 55C to +125C 1/2 LSB 1 LSB E-20A NOTES 1 Analog Devices reserves the right to ship either ceramic (D-18) or cerdip (Q-18) hermetic packages. 2 To order MIL-STD-883, Class B process parts, add /883B to part number. Contact local sales office for military data sheet. 3 E = Leadless Ceramic Chip Carrier N = Plastic DIP P = Plastic Leaded Chip Carrier Q = Cerdip R = Small Outline IC. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or Tel: 617/329-4700 World Wide Web Site: (V = +15 V, V = +10 V OUT 1 = OUT 2 = GND = 0 V unless otherwise noted) AD7541ASPECIFICATIONS DD REF T =T = A A 1 Parameter Version +258CT T Units Test Conditions/Comments MIN, MAX ACCURACY Resolution All 12 12 Bits Relative Accuracy J, A, S 1 1 LSB max 1 LSB = 0.024% of Full Scale K, B, T 1/2 1/2 LSB max 1/2 LSB = 0.012% of Full Scale Differential Nonlinearity J, A, S 1 1 LSB max All Grades Guaranteed Monotonic K, B, T 1/2 1/2 LSB max to 12 Bits, T to T . MIN MAX Gain Error J, A, S 6 8 LSB max Measured Using Internal R and Includes FB K, B, T 3 5 LSB max Effect of Leakage Current and Gain TC. Gain Error Can Be Trimmed to Zero. 2 Gain Temperature Coefficient DGain/DTemperature All 5 5 ppm/C max Typical Value Is 2 ppm/C. Output Leakage Current OUT1 (Pin 1) J, K 5 10 nA max All Digital Inputs = 0 V. A, B 5 10 nA max S, T 5 200 nA max OUT2 (Pin 2) J, K 5 10 nA max All Digital Inputs = V . DD A, B 5 10 nA max S, T 5 200 nA max REFERENCE INPUT Input Resistance (Pin 17 to GND) All 718 718 k min/max Typical Input Resistance = 11 k. Typical Input Resistance Temperature Coefficient = 300 ppm/C. DIGITAL INPUTS V (Input HIGH Voltage) All 2.4 2.4 V min IH V (Input LOW Voltage) All 0.8 0.8 V max IL I (Input Current) All 1 1 A max Logic Inputs Are MOS Gates. I typ (25C) = 1 nA. IN IN 2 C (Input Capacitance) All 8 8 pF max V = 0 V IN IN POWER SUPPLY REJECTION DGain/DV All 0.01 0.02 % per % max DV = 5% DD DD POWER SUPPLY V Range All +5 to +16 +5 to +16 V min/V max Accuracy Is Not Guaranteed Over This Range. DD I All 2 2 mA max All Digital Inputs V or V . DD IL IH 100 500 A max All Digital Inputs 0 V or V . DD AC PERFORMANCE CHARACTERISTICS These Characteristics are included for Design Guidance only and are not subject to test. V = +15 V, V = +10 V except where noted, DD IN OUT1 = 0UT2 = GND = 0 V, Output Amp is AD544 except where noted. T =T = A A 1 1 Parameter Version +258CT T Units Test Conditions/Comments MIN, MAX = 13 pF. PROPAGATION DELAY (From Digital Input OUT 1 Load = 100 , C EXT Change to 90% of Final Analog Output) All 100 ns typ Digital Inputs = 0 V to V or V to 0 V. DD DD DIGITAL TO ANALOG GLITCH V = 0 V. All digital inputs 0 V to V or REF DD IMPULSE V to 0 V. DD All 1000 nV-sec typ Measured using Model 50K as output amplifier. 3 MULTIPLYING FEEDTHROUGH ERROR (V to OUT1) All 1.0 mV p-p typ V = 10 V, 10 kHz sine wave. REF REF OUTPUT CURRENT SETTLING TIME All 0.6 s typ To 0.01% of full-scale range. OUT 1 Load = 100 , C = 13 pF. EXT Digital Inputs = 0 V to V or V to 0 V. DD DD OUTPUT CAPACITANCE C (Pin 1) All 200 200 pF max Digital Inputs OUT1 C (Pin 2) All 70 70 pF max = V OUT2 IH C (Pin 1) All 70 70 pF max Digital Inputs OUT1 C (Pin 2) All 200 200 pF max = V OUT2 IL NOTES 1 Temperature range as follows: J, K versions, 0C to +70C A, B versions, 25C to +85C S, T versions, 55C to +125C. 2 Guaranteed by design but not production tested. 3 To minimize feedthrough in the ceramic package (Suffix D) the user must ground the metal lid. Specifications subject to change without notice. 2 REV. B