2 LC MOS a +3.3 V/+5 V, Low Power, Quad 12-Bit DAC AD7564 FEATURES FUNCTIONAL BLOCK DIAGRAM Four 12-Bit DACs in One Package 4-Quadrant Multiplication NC AGND V DGND V D V C V B V A R A DD REF REF REF REF FB Separate References Single Supply Operation I A INPUT DAC A OUT1 Guaranteed Specifications with +3.3 V/+5 V Supply 12 12 DAC A LATCH A LATCH I A OUT2 Low Power R B FB Versatile Serial Interface I B INPUT DAC B OUT1 12 12 DAC B LATCH B LATCH Simultaneous Update Capability I B OUT2 R C Reset Function FB I C INPUT OUT1 DAC C 28-Pin SOIC, SSOP and DIP Packages 12 12 DAC C LATCH C LATCH I C OUT2 R D APPLICATIONS FB I D INPUT DAC D OUT1 Process Control 12 12 DAC D LATCH D LATCH I D OUT2 Portable Instrumentation 12 General Purpose Test Equipment CLR FSIN CONTROL LOGIC + CLKIN LDAC INPUT SHIFT REGISTER SDIN AD7564 A0 A1 SDOUT GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD7564 contains four 12-bit DACs in one monolithic 1. The AD7564 contains four 12-bit current output DACs with device. The DACs are standard current output with separate separate V inputs. REF V , I , I and R terminals. These DACs operate from REF OUT1 OUT2 FB 2. The AD7564 can be operated from a single +3.3 V to +5 V a single +3.3 V to +5 V supply. supply. The AD7564 is a serial input device. Data is loaded using 3. Simultaneous update capability and reset function are FSIN, CLKIN and SDIN. Two address pins A0 and A1 set up available. a device address, and this feature may be used to simplify device 4. The AD7564 features a fast, versatile serial interface com- loading in a multi-DAC environment. Alternatively, A0 and A1 patible with modern 3 V and 5 V microprocessors and can be ignored and the serial out capability used to configure a microcomputers. daisy-chained system. 5. Low power, 50 W at 5 V and 33 W at 3.3 V. All DACs can be simultaneously updated using the asynchro- nous LDAC input, and they can be cleared by asserting the asynchronous CLR input. The device is packaged in 28-pin SOIC, SSOP and DIP packages. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781/329-4700 Fax: 781/461-3113AD7564SPECIFICATIONS (V = +4.75 V to +5.25 V I A to I D = I A = I D = AGND = 0 V V = +10 V T = T to T , DD OUT1 OUT1 OUT2 OUT2 REF A MIN MAX Normal Mode unless otherwise noted) 1 Parameter B Grade Units Test Conditions/Comments ACCURACY 12 Resolution 12 Bits 1 LSB = V /2 = 2.44 mV when V = 10 V REF REF Relative Accuracy 0.5 LSB max Differential Nonlinearity 0.5 LSB max All Grades Guaranteed Monotonic Over Temperature Gain Error +25C 4 LSBs max T to T 5 LSBs max MIN MAX 2 Gain Temperature Coefficient 2 ppm FSR/C typ 5 ppm FSR/C max Output Leakage Current I OUT1 +25C 10 nA max T to T 50 nA max MIN MAX REFERENCE INPUT Input Resistance 6 k min Typical Input Resistance = 9.5 k 13 k max Ladder Resistance Mismatch 2 % max Typically 0.6% DIGITAL INPUTS V , Input High Voltage 2.4 V min INH V , Input Low Voltage 0.8 V max INL I , Input Current 1 A max INH 2 C , Input Capacitance 10 pF max IN DIGITAL OUTPUT (SDOUT) Output Low Voltage (V ) 0.4 V max Load Circuit as in Figure 2. OL Output High Voltage (V ) 4.0 V min OH POWER REQUIREMENTS V Range 4.75/5.25 V min/V max Part Functions from 3.3 V to 5.25 V DD 2 Power Supply Rejection Gain/V 75 dB typ DD I 10 A max V = V , V = 0 V DD INH DD INL At Input Levels of 0.8 V and 2.4 V, I is DD Typically 2 mA. NOTES 1 Temperature range is as follows: B Version: 40C to +85C. 2 Not production tested. Guaranteed by characterization at initial product release. Specifications subject to change without notice. REV. B 2