Single and Multichannel, Synchronous a Voltage-to-Frequency Converters AD7741/AD7742 FEATURES FUNCTIONAL BLOCK DIAGRAMS AD7741: One Single-Ended Input Channel V DD REFIN/OUT PD AD7742: Two Differential or Three Pseudo-Differential Input Channels +2.5V Integral Nonlinearity of 0.012% at f (Max) = 2.75 MHz OUT REFERENCE POWER-DOWN (AD7742) and at f (Max) = 1.35 MHz (AD7741) OUT LOGIC Single +5 V Supply Operation VOLTAGE-TO- Buffered Inputs FREQUENCY f V X1 OUT IN MODULATOR Programmable Gain Analog Front-End On-Chip +2.5 V Reference Internal/External Reference Option AD7741 CLOCK Power Down to 35 mA Max GENERATION Minimal External Components Required 8-Lead and 16-Lead DIP and SOIC Packages CLKIN CLKOUT GND APPLICATIONS Low Cost Analog-to-Digital Conversion Signal Isolation V DD UNI/BIP PD GAIN AD7742 POWER-DOWN LOGIC V 1 IN V 2 VOLTAGE-TO- IN INPUT FREQUENCY f X1/X2 OUT MUX MODULATOR V 3 IN V 4 IN GENERAL DESCRIPTION +2.5V CLOCK A1 The AD7741/AD7742 are a new generation of synchronous REFERENCE GENERATION voltage-to-frequency converters (VFCs). The AD7741 is a A0 single-channel version in an 8-lead package (SOIC/DIP) and the AD7742 is a multichannel version in a 16-lead package (SOIC/ GND CLKIN CLKOUT REFIN REFOUT DIP). No user trimming is required to achieve the specified performance. The AD7741 has a single buffered input whereas the AD7742 The AD7741 has a single-ended voltage input range from 0 V has four buffered inputs that may be configured as two fully- to REFIN. The AD7742 has a differential voltage input range differential inputs or three pseudo-differential inputs. Both parts from V to +V . Both parts operate from a single +5 V REF REF include an on-chip +2.5 V bandgap reference that provides the supply consuming typically 6 mA, and also contain a power- user with the option of using this internal reference or an exter- down feature that reduces the current consumption to less than nal reference. 35 m A. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or Tel: 781/329-4700 World Wide Web Site: (V = +4.75 V to +5.25 V V = +2.5 V f = 6.144 MHz all specifications T to DD REF CLKIN MIN T unless otherwise noted.) AD7741SPECIFICATIONS MAX 1 B and Y Version 2 Parameter Min Typ Max Units Conditions/Comments DC PERFORMANCE Integral Nonlinearity 3 4 f = 200 kHz 0.012 % of Span CLKIN 3 f = 3 MHz 0.012 % of Span CLKIN f = 6.144 MHz 0.024 % of Span V > 4.8 V CLKIN DD Offset Error 40 mV Gain Error 0 +0.8 +1.6 % of Span 3 Offset Error Drift 30 m V/ C 3 Gain Error Drift 16 ppm of Span/ C 3 Power Supply Rejection Ratio 63 dB D V = 5% DD 5 ANALOG INPUT Input Current 50 100 nA Input Voltage Range 0 V V REF +2.5 V REFERENCE (REFIN/OUT) REFIN Nominal Input Voltage 2.5 V 6 Input Impedance N/A REFOUT Output Voltage 2.38 2.50 2.60 V 3 Output Impedance 1kW 3 Reference Drift 50 ppm/ C Line Rejection 60 dB 3 Reference Noise (0.1 Hz to 10 Hz) 100 m V p-p LOGIC OUTPUT 7 Output High Voltage, V 4.0 V Output Sourcing 800 m A OH 7 Output Low Voltage, V 0.4 V Output Sinking 1.6 mA OL Minimum Output Frequency 0.05 f Hz V = 0 V CLKIN IN Maximum Output Frequency 0.45 f Hz V = V CLKIN IN REF LOGIC INPUT PD ONLY Input High Voltage, V 2.4 V IH Input Low Voltage, V 0.8 V IL Input Current 100 nA Pin Capacitance 6 10 pF CLKIN ONLY Input High Voltage, V 3.5 V IH Input Low Voltage, V 0.8 V IL Input Current 2 m A Pin Capacitance 6 10 pF CLOCK FREQUENCY Input Frequency 6.144 MHz For Specified Performance POWER REQUIREMENTS V 4.75 5.25 V DD I (Normal Mode) 8 mA Output Unloaded DD I (Power-Down) 15 35 m A DD 3 Power-Up Time 30 m s Coming Out of Power-Down Mode NOTES 1 Temperature ranges: B Version 40 C to +85 C: Y Version: 40 C to +105 C. 2 See Terminology. 3 Guaranteed by design and characterization, not production tested. 4 Span = Maximum Output FrequencyMinimum Output Frequency. 5 The absolute voltage on the input pin must not go more positive than V 2.25 V or more negative than GND. DD 6 Because this pin is bidirectional, any external reference must be capable of sinking/sourcing 400 m A in order to overdrive the internal reference. 7 These logic levels apply to CLKOUT only when it is loaded with one CMOS load. Specifications subject to change without notice. 2 REV. 0