Low Noise, High Speed Amplifier for 16-Bit Systems AD8021 FEATURES CONNECTION DIAGRAM Low noise AD8021 LOGIC 1 8 DISABLE 2.1 nV/Hz input voltage noise REFERENCE 2.1 pA/Hz input current noise 2 7 +V IN S Custom compensation 3 V +IN 6 OUT Constant bandwidth from G = 1 to G = 10 V C S 4 5 COMP High speed 200 MHz (G = 1) Figure 1. SOIC-8 (R-8) and MSOP-8 (RM-8) 190 MHz (G = 10) Low power 34 mW or 6.7 mA typical for 5 V supply The AD8021 allows the user to choose the gain bandwidth Output disable feature, 1.3 mA product that best suits the application. With a single capacitor, Low distortion the user can compensate the AD8021 for the desired gain with 93 dBc second harmonic, fC = 1 MHz little trade-off in bandwidth. The AD8021 is a well-behaved 108 dBc third harmonic, fC = 1 MHz amplifier that settles to 0.01% in 23 ns for a 1 V step. It has a fast DC precision overload recovery of 50 ns. 1 mV maximum input offset voltage The AD8021 is stable over temperature with low input offset 0.5 V/C input offset voltage drift voltage drift and input bias current drift, 0.5 V/C and 10 nA/C, Wide supply range, 5 V to 24 V respectively. The AD8021 is also capable of driving a 75 line Low price with 3 V video signals. Small packaging Available in SOIC-8 and MSOP-8 The AD8021 is both technically superior and priced considerably less than comparable amps drawing much higher quiescent APPLICATIONS current. The AD8021 is a high speed, general-purpose amplifier, ADC preamps and drivers ideal for a wide variety of gain configurations and can be used Instrumentation preamps throughout a signal processing chain and in control loops. The Active filters AD8021 is available in both standard 8-lead SOIC and MSOP Portable instrumentation packages in the industrial temperature range of 40C to +85C. Line receivers Precision instruments Ultrasound signal processing 24 V = 50mV p-p OUT High gain circuits 21 G = 10, R = 1k, R = 100 , F G 18 R = 100 , C = 0pF IN C GENERAL DESCRIPTION 15 G = 5, R = 1k , R = 200 , The AD8021 is an exceptionally high performance, high speed F G 12 R = 66.5 , C = 1.5pF IN C voltage feedback amplifier that can be used in 16-bit resolution 9 systems. It is designed to have both low voltage and low current 6 noise (2.1 nV/Hz typical and 2.1 pA/Hz typical) while operating G = 2, R = 499 , R = 249 , F G 3 R = 63.4 , C = 4pF IN C at the lowest quiescent supply current (7 mA 5 V) among todays high speed, low noise op amps. The AD8021 operates 0 G = 1, R = 499 , R = 499 , F G over a wide range of supply voltages from 2.25 V to 12 V, as 3 R = 56.2 , C = 7pF IN C well as from single 5 V supplies, making it ideal for high speed, 6 0.1M 1M 10M 100M 1G low power instruments. An output disable pin allows further FREQUENCY (Hz) reduction of the quiescent supply current to 1.3 mA. Figure 2. Small Signal Frequency Response Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. CLOSED-LOOP GAIN (dB) 01888-001 01888-002AD8021 TABLE OF CONTENTS Features .............................................................................................. 1 Applications..................................................................................... 19 Applications....................................................................................... 1 Using the Disable Feature.......................................................... 20 General Description ......................................................................... 1 Theory of Operation ...................................................................... 21 Connection Diagram ....................................................................... 1 PCB Layout Considerations...................................................... 21 Revision History ............................................................................... 2 Driving 16-Bit ADCs ................................................................. 22 Specifications..................................................................................... 3 Differential Driver...................................................................... 22 Absolute Maximum Ratings............................................................ 7 Using the AD8021 in Active Filters ......................................... 23 Maximum Power Dissipation ..................................................... 7 Driving Capacitive Loads.......................................................... 23 ESD Caution.................................................................................. 7 Outline Dimensions ....................................................................... 25 Pin Configuration and Function Descriptions............................. 8 Ordering Guide .......................................................................... 25 Typical Performance Characteristics ............................................. 9 Test Circuits................................................................................. 17 REVISION HISTORY 5/06Rev. E to Rev. F 7/03Rev. B to Rev. C Updated Format..................................................................Universal Deleted All References to Evaluation Board...................Universal Changes to General Description .................................................... 1 Replaced Figure 2 ..............................................................................5 Changes to Figure 3.......................................................................... 7 Updated Outline Dimensions....................................................... 20 Changes to Figure 60...................................................................... 19 2/03Rev. A to Rev. B Changes to Table 9.......................................................................... 23 Edits to Evaluation Board Applications....................................... 20 3/05Rev. D to Rev. E Edits to Figure 17 ........................................................................... 20 Updated Format..................................................................Universal 6/02Rev. 0 to Rev. A Change to Figure 19 ....................................................................... 11 Edits to Specifications.......................................................................2 Change to Figure 25 ....................................................................... 12 Change to Table 7 and Table 8 ...................................................... 22 Change to Driving 16-Bit ADCs Section .................................... 22 10/03Rev. C to Rev. D Updated Format..................................................................Universal Rev. F Page 2 of 28