4:1 HDMI/DVI Switch with Equalization AD8191 FEATURES FUNCTIONAL BLOCK DIAGRAM Four inputs, one output HDMI/DVI links Four TMDS channels per link Supports 250 Mbps to 1.65 Gbps data rates Supports 25 MHz to 165 MHz pixel clocks RESET Equalized inputs for operation with long HDMI cables PARALLEL AD8191 SERIAL 2 2 (20 meters at 1080p) AVCC Fully buffered unidirectional inputs/outputs I2C SDA DVCC CONFIG CONTROL I2C SCL 3 INTERFACE LOGIC AMUXVCC Globally switchable, 50 on-chip terminations I2C ADDR 2:0 AVEE VTTI Pre-emphasized outputs DVEE Low added jitter + 4 VTTO Single-supply operation (3.3 V) IP A 3:0 4 IN A 3:0 Four auxiliary channels per link 4 + IP B 3:0 4 4 + Bidirectional unbuffered inputs/outputs IN B 3:0 OP 3:0 SWITCH 4 + 4 CORE ON 3:0 IP C 3:0 PE Flexible supply operation (3.3 V to 5 V) 4 EQ IN C 3:0 + 4 HDCP standard compatible IP D 3:0 4 IN D 3:0 Allows switching of DDC bus and two additional signals HIGH SPEED BUFFERED Multiple channel bundling modes VTTI 1x (4:1) HDMI/DVI link switch (default) 4 AUX A 3:0 4 2x (8:1) TMDS channel and auxiliary signal switch AUX B 3:0 4 SWITCH 4 AUX COM 3:0 CORE AUX C 3:0 1x (16:1) TMDS channel and auxiliary signal switch 4 AUX D 3:0 Output disable feature LOW SPEED UNBUFFERED BIDIRECTIONAL Reduced power dissipation Removable output termination Figure 1. Allows building of larger arrays Two AD8191s support HDMI/DVI dual-link TYPICAL APPLICATION Standards compatible: HDMI receiver, DVI, HDCP GAME CONSOLE MEDIA CENTER HDTV SET 2 Serial (I C slave) and parallel control interface HDMI 100-lead, 14 mm 14 mm LQFP, Pb-free package RECEIVER SET-TOP BOX DVD PLAYER APPLICATIONS AD8191 01:18 Multiple input displays Projectors Figure 2. Typical HDTV Application A/V receivers Set-top boxes Advanced television (HDTV) sets GENERAL DESCRIPTION The AD8191 is provided in a 100-lead LQFP, Pb-free, surface mount package specified to operate over the 40C to +85C The AD8191 is a HDMI/DVI switch featuring equalized TMDS temperature range. inputs and pre-emphasized TMDS outputs, ideal for systems with long cable runs. Outputs can be set to a high impedance PRODUCT HIGHLIGHTS state to reduce the power dissipation and/or allow the construc- 1. Supports data rates up to 1.65 Gbps, enabling 1080p HDMI tion of larger arrays using the wire-OR technique. Flexible formats and UXGA (1600 1200) DVI resolutions. channel bundling modes (for both the TMDS channels and the 2. Input cable equalizer enables use of long cables at the input auxiliary signals) allow the AD8191 to be configured as a 4:1 single (more than 20 meters of 24 AWG cable at 1080p). HDMI/DVI link switch, a dual 8:1 switch, or a single 16:1 switch. 3. A uxiliary switch routes a DDC bus and two additional signals for a single-chip, HDMI 1.2a receive-compliant solution. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PP CH 1:0 PP OTO PP OCL PP EQ PP EN PP PRE 1:0 06123-001 06123-002AD8191 TABLE OF CONTENTS Features .............................................................................................. 1 Write Procedure.......................................................................... 16 Applications....................................................................................... 1 Read Procedure........................................................................... 17 Functional Block Diagram .............................................................. 1 Parallel Control Interface .............................................................. 18 Typical Application........................................................................... 1 Serial Interface Configuration Registers ..................................... 19 General Description ......................................................................... 1 High Speed Device Modes Register......................................... 19 Product Highlights ........................................................................... 1 Auxiliary Device Modes Register............................................. 20 Revision History ............................................................................... 2 Receiver Settings Register ......................................................... 22 Specifications..................................................................................... 3 Input Termination Pulse Register 1 and Register 2 ............... 22 Absolute Maximum Ratings............................................................ 5 Receive Equalizer Register 1 and Register 2 ........................... 22 Thermal Resistance ...................................................................... 5 Transmitter Settings Register.................................................... 22 Maximum Power Dissipation ..................................................... 5 Parallel Interface Configuration Registers .................................. 23 ESD Caution.................................................................................. 5 High Speed Device Modes Register......................................... 23 Pin Configuration and Function Descriptions............................. 6 Auxiliary Device Modes Register............................................. 23 Typical Performance Characteristics ............................................. 9 Receiver Settings Register ......................................................... 24 Theory of Operation ...................................................................... 13 Input Termination Pulse Register 1 and Register 2 ............... 24 Introduction ................................................................................ 13 Receive Equalizer Register 1 and Register 2 ........................... 24 Input Channels............................................................................ 13 Transmitter Settings Register.................................................... 24 Output Channels ........................................................................ 13 Application Notes ........................................................................... 25 High Speed (TMDS) Switching Modes ................................... 14 Pinout........................................................................................... 25 Auxiliary Switch.......................................................................... 14 Cable Lengths and Equalization............................................... 25 Auxiliary (Low Speed) Switching Modes................................ 15 PCB Layout Guidelines.............................................................. 26 Serial Control Interface.................................................................. 16 Outline Dimensions ....................................................................... 30 Reset ............................................................................................. 16 Ordering Guide .......................................................................... 30 REVISION HISTORY 10/06Revision 0: Initial Version Rev. 0 Page 2 of 32