Single-Supply, Low Power, Precision FET Input Quad Buffer Data Sheet AD8244 FEATURES PIN CONFIGURATION AD8244 Low power IN A 1 10 IN D 250 A maximum supply current per amplifier OUT A 2 9 OUT D FET input +V 3 8 V S S 2 pA maximum input bias current at 25C OUT B 4 7 OUT C Extremely high input impedance 5 6 IN B IN C Low noise Figure 1. Pinout Isolates Inputs from 13 nV/Hz voltage noise at 1 kHz Low-Impedance Leakage Sources 0.4 V p-p voltage noise (0.1 Hz to 10 Hz) 0.8 fA/Hz current noise at 1 kHz High dc precision 3 V/C maximum offset drift (B grade) 3 MHz bandwidth Unique pinout No leakage from inputs to supply pins Provides guarding capability Rail-to-rail output Single-supply operation Input range extends to ground Wide supply range Single-supply: 3 V to 36 V Dual-supply: 1.5 V to 18 V Available in a compact 10-lead MSOP APPLICATIONS Biopotential electrodes Medical instrumentation 1s/DIV 200nV/DIV High impedance sensor conditioning Figure 2. 0.1 Hz to 10 Hz Voltage Noise Filters Photodiode amplifiers GENERAL DESCRIPTION The AD8244 is a precision, low power, FET input, quad unity-gain high impedance inputs from the low impedance supplies and buffer that is designed to isolate very large source impedances outputs of the other buffers. This configuration simplifies from the rest of the signal chain. The 2 pA maximum bias guarding while reducing board space, allowing high performance current, near zero current noise, and 10 T input impedance and high density in the same design. introduce almost no error, even with source impedance well The AD8244 design is focused on solving problems specific to into the megaohms. buffers. This includes close channel-to-channel matching which Many traditional operational amplifier pinouts have a supply allows channels of the AD8244 to be used in differential signal pin that is next to the noninverting input. A guard trace must be chains with minimal error. With its low voltage noise, wide routed between these pins to avoid leakage currents much larger supply range, and high precision, the AD8244 is also flexible than the bias current of a FET input op amp. Guard traces can enough to provide high performance anywhere a unity-gain be routed between pins for large packages, such as DIP or even buffer is needed, even with low source resistance. SOIC however, the board area consumed by these packages is The AD8244 is specified over the industrial temperature range prohibitive for many modern applications. The AD8244 solves of 40C to +85C. It is available in a 10-lead MSOP package. this problem with a unique pinout that physically separates the Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20132014 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 11689-001 11689-002AD8244 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Guarding ...................................................................................... 14 Applications ....................................................................................... 1 Input Protection ......................................................................... 15 Pin Configuration ............................................................................. 1 Layout Considerations ............................................................... 15 General Description ......................................................................... 1 Differential Signal Chains ......................................................... 15 Revision History ............................................................................... 2 Low Output Impedance vs. Frequency.................................... 15 Specifications ..................................................................................... 3 Applications Information .............................................................. 16 Absolute Maximum Ratings ............................................................ 6 Electrocardiogram (ECG) ......................................................... 16 Thermal Resistance ...................................................................... 6 Filtering ........................................................................................ 16 ESD Caution .................................................................................. 6 Photodiode Amplifier ................................................................ 17 Pin Configuration and Function Descriptions ............................. 7 Low Noise, JFET Input Buffer .................................................. 18 Typical Performance Characteristics ............................................. 8 Outline Dimensions ....................................................................... 19 Theory of Operation ...................................................................... 14 Ordering Guide .......................................................................... 19 Overview ...................................................................................... 14 REVISION HISTORY 12/14Rev. 0 to Rev. A Added Figure 1 Caption and Changes to Figure 2 ....................... 1 Changes to Low Output Impedance vs. Frequency Section ..... 15 Changes to Electrocardiogram (ECG) Section, Filtering Section, Figure 42, and Figure 43 ................................................................ 16 Changes to Figure 44 ...................................................................... 17 Changes to Ordering Guide .......................................................... 19 10/13Revision 0: Initial Version Rev. A Page 2 of 20