DC-to-2.5 GHz High IP3 Active Mixer AD8343 FEATURES FUNCTIONAL BLOCK DIAGRAM High-performance active mixer AD8343 COMM 1 14 COMM Broadband operation to 2.5 GHz INPP 2 13 OUTP Conversion gain: 7 dB Input IP3: 16.5 dBm INPM 3 12 OUTM LO drive: 10 dBm DCPL 4 11 COMM Noise figure: 14 dB VPOS 5 10 LOIP Input P : 2.8 dBm 1dB BIAS PWDN 6 9 LOIM Differential LO, IF and RF Ports 7 8 50 LO input impedance COMM COMM Single-supply operation: 5 V 50 mA typical Figure 1. Power-down mode 20 A typical APPLICATIONS Cellular base stations Wireless LAN Satellite converters SONET/SDH radio Radio links RF instrumentation The LO driver circuitry typically consumes 15 mA of current. GENERAL DESCRIPTION Two external resistors are used to set the mixer core current for The AD8343 is a high-performance broadband active mixer. required performance, resulting in a total current of 20 mA to With wide bandwidth on all ports and very low intermodula- 60 mA. This corresponds to power consumption of 100 mW to tion distortion, the AD8343 is well suited for demanding 300 mW with a single 5 V supply. transmit applications or receive channel applications. The AD8343 is fabricated on Analog Devices, Inc.s high- The AD8343 provides a typical conversion gain of 7 dB. The performance 25 GHz silicon bipolar IC process. The AD8343 is integrated LO driver supports a 50 differential input imped- available in a 14-lead TSSOP package. It operates over a 40C ance with low LO drive level, helping to minimize external to +85C temperature range. A device-populated evaluation component count. board is available. The open-emitter differential inputs can be interfaced directly to a differential filter or driven through a balun (transformer) to provide a balanced drive from a single-ended source. The open-collector differential outputs can be used to drive a differential IF signal interface or convert to a single-ended signal through the use of a matching network or transformer. When centered on the VPOS supply voltage, the outputs swing 1 V. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 01034-001AD8343 TABLE OF CONTENTS Features .............................................................................................. 1 Power-Down Interface (PWDN) ............................................. 16 Applications....................................................................................... 1 AC Interfaces................................................................................... 17 Functional Block Diagram .............................................................. 1 Input Interface (INPP and INPM)............................................... 18 General Description ......................................................................... 1 Single-Ended-to-Differential Conversion............................... 18 Revision History ............................................................................... 2 Input Matching Considerations ............................................... 18 Specifications..................................................................................... 3 Input Biasing Considerations ................................................... 19 Basic Operating Instructions ...................................................... 3 Output Interface (OUTP, OUTM) ............................................... 20 Typical AC Performance.............................................................. 4 Output Matching Considerations ............................................ 20 Typical Isolation Performance.................................................... 4 Output Biasing Considerations ................................................ 20 Absolute Maximum Ratings............................................................ 5 Input and Output Stability Considerations................................. 21 ESD Caution.................................................................................. 5 Local Oscillator Input Interface (LOIP, LOIM)..................... 22 Pin Configuration and Function Descriptions............................. 6 DC Coupling the LO.................................................................. 22 Simplified Interface Schematics ................................................. 7 A Step-by-Step Approach to Impedance Matching............... 23 Typical Performance Characteristics ............................................. 8 Applications..................................................................................... 26 Receiver Characteristics .............................................................. 8 Downconverting Mixer ............................................................. 26 Transmit Characteristics............................................................ 13 Upconverting Mixer................................................................... 26 Circuit Description......................................................................... 15 Evaluation Board ............................................................................ 27 DC Interfaces .................................................................................. 16 Outline Dimensions....................................................................... 32 Biasing and Decoupling (VPOS, DCPL)................................. 16 Ordering Guide .......................................................................... 32 REVISION HISTORY 11/06Rev. A to Rev. B 3/02Rev. 0 to Rev. A Changes to General Description .................................................... 1 Edits to Absolute Maximum Ratings..............................................3 Changes to Table 1............................................................................ 3 Edits to Input Interface (LOIP, LOIM) ........................................ 17 Changes to Table 3............................................................................ 4 Edits to Table III ............................................................................. 22 Changes to Power-Down Interface (PWDN) Section ............... 16 Edits to Table IV ............................................................................. 23 Changes to Output Matching Considerations Section.............. 20 Edits to Table V............................................................................... 23 Changes to Circuit Description Section ...................................... 15 Edits to Figure 23............................................................................ 23 Changes to Output Matching Considerations............................ 20 Edits to Figure 24............................................................................ 23 Changes to Upconverting Mixer Section .................................... 26 6/00Revision 0Initial Version Changes to Table 6, Table 7, and Table 8 ..................................... 27 Changes to Figure 71 and Figure 72............................................. 29 Updated Outline Dimensions ....................................................... 32 Changes to Ordering Guide .......................................................... 32 Rev. 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